spi: spi-fsl-lpspi: Move controller initialization further down

This is a preparation for reading number of chip-selects from hardware.
This needs IO resources mapped and peripheral clocking enabled.
No functional changes intended.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Link: https://lore.kernel.org/r/20230717085934.409476-2-alexander.stein@ew.tq-group.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c
index 0a0677f11a3d9dc31835f4fb342a7fe34f078047..f3b7bb1e52eb1f49af8ab8cc1536ebe51794d42b 100644 (file)
--- a/drivers/spi/spi-fsl-lpspi.c
+++ b/drivers/spi/spi-fsl-lpspi.c
@@ -846,22 +846,6 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
        fsl_lpspi->is_slave = is_slave;
        fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node,
                                                "fsl,spi-only-use-cs1-sel");
-       if (of_property_read_u32((&pdev->dev)->of_node, "num-cs",
-                                &num_cs))
-               num_cs = 1;
-
-       controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
-       controller->transfer_one = fsl_lpspi_transfer_one;
-       controller->prepare_transfer_hardware = lpspi_prepare_xfer_hardware;
-       controller->unprepare_transfer_hardware = lpspi_unprepare_xfer_hardware;
-       controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
-       controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX;
-       controller->dev.of_node = pdev->dev.of_node;
-       controller->bus_num = pdev->id;
-       controller->num_chipselect = num_cs;
-       controller->slave_abort = fsl_lpspi_slave_abort;
-       if (!fsl_lpspi->is_slave)
-               controller->use_gpio_descriptors = true;
 
        init_completion(&fsl_lpspi->xfer_done);
 
@@ -911,6 +895,22 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
        temp = readl(fsl_lpspi->base + IMX7ULP_PARAM);
        fsl_lpspi->txfifosize = 1 << (temp & 0x0f);
        fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f);
+       if (of_property_read_u32((&pdev->dev)->of_node, "num-cs",
+                                &num_cs))
+               num_cs = 1;
+
+       controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
+       controller->transfer_one = fsl_lpspi_transfer_one;
+       controller->prepare_transfer_hardware = lpspi_prepare_xfer_hardware;
+       controller->unprepare_transfer_hardware = lpspi_unprepare_xfer_hardware;
+       controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
+       controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX;
+       controller->dev.of_node = pdev->dev.of_node;
+       controller->bus_num = pdev->id;
+       controller->num_chipselect = num_cs;
+       controller->slave_abort = fsl_lpspi_slave_abort;
+       if (!fsl_lpspi->is_slave)
+               controller->use_gpio_descriptors = true;
 
        ret = fsl_lpspi_dma_init(&pdev->dev, fsl_lpspi, controller);
        if (ret == -EPROBE_DEFER)