target/i386: replace read_crN helper with read_cr8
authorPaolo Bonzini <pbonzini@redhat.com>
Thu, 13 Jun 2024 17:43:30 +0000 (19:43 +0200)
committerPaolo Bonzini <pbonzini@redhat.com>
Mon, 17 Jun 2024 07:47:39 +0000 (09:47 +0200)
All other control registers are stored plainly in CPUX86State.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target/i386/helper.h
target/i386/tcg/emit.c.inc
target/i386/tcg/sysemu/misc_helper.c

index 2f46cffabd8f1e892364e1bed323741651ee1be9..eeb8df56eaa2b042840e8e36e59354400d672206 100644 (file)
@@ -95,7 +95,7 @@ DEF_HELPER_FLAGS_2(monitor, TCG_CALL_NO_WG, void, env, tl)
 DEF_HELPER_FLAGS_2(mwait, TCG_CALL_NO_WG, noreturn, env, int)
 DEF_HELPER_1(rdmsr, void, env)
 DEF_HELPER_1(wrmsr, void, env)
-DEF_HELPER_FLAGS_2(read_crN, TCG_CALL_NO_RWG, tl, env, int)
+DEF_HELPER_FLAGS_1(read_cr8, TCG_CALL_NO_RWG, tl, env)
 DEF_HELPER_FLAGS_3(write_crN, TCG_CALL_NO_RWG, void, env, int, tl)
 #endif /* !CONFIG_USER_ONLY */
 
index db56bf7aee19c0a21bdc9e9b00f4323477db3712..2d0c212e5ca4203fe5569df30e45d9a77a938e7f 100644 (file)
@@ -246,7 +246,7 @@ static void gen_load(DisasContext *s, X86DecodedInsn *decode, int opn, TCGv v)
     case X86_OP_CR:
         if (op->n == 8) {
             translator_io_start(&s->base);
-            gen_helper_read_crN(v, tcg_env, tcg_constant_i32(op->n));
+            gen_helper_read_cr8(v, tcg_env);
         } else {
             tcg_gen_ld_tl(v, tcg_env, offsetof(CPUX86State, cr[op->n]));
         }
index 7fa0c5a06de2fe5499083203cacdcbc435d43b7c..094aa56a20d1f2b86723d1640cc888203c986278 100644 (file)
@@ -63,23 +63,13 @@ target_ulong helper_inl(CPUX86State *env, uint32_t port)
                              cpu_get_mem_attrs(env), NULL);
 }
 
-target_ulong helper_read_crN(CPUX86State *env, int reg)
+target_ulong helper_read_cr8(CPUX86State *env)
 {
-    target_ulong val;
-
-    switch (reg) {
-    default:
-        val = env->cr[reg];
-        break;
-    case 8:
-        if (!(env->hflags2 & HF2_VINTR_MASK)) {
-            val = cpu_get_apic_tpr(env_archcpu(env)->apic_state);
-        } else {
-            val = env->int_ctl & V_TPR_MASK;
-        }
-        break;
+    if (!(env->hflags2 & HF2_VINTR_MASK)) {
+        return cpu_get_apic_tpr(env_archcpu(env)->apic_state);
+    } else {
+        return env->int_ctl & V_TPR_MASK;
     }
-    return val;
 }
 
 void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)