dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chan

iMX95 move channel mux register to management page address space. This
prepare to support iMX95.

Add mux_addr in struct fsl_edma_chan. No function change.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20231221153528.1588049-4-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
index 50f55d7566a33595b166f11f1580cf8494abd57d..65f466ab9d4da3970c3cc5c36871821f2e518a88 100644 (file)
--- a/drivers/dma/fsl-edma-common.c
+++ b/drivers/dma/fsl-edma-common.c
@@ -97,8 +97,8 @@ static void fsl_edma3_enable_request(struct fsl_edma_chan *fsl_chan)
                 * ch_mux: With the exception of 0, attempts to write a value
                 * already in use will be forced to 0.
                 */
-               if (!edma_readl_chreg(fsl_chan, ch_mux))
-                       edma_writel_chreg(fsl_chan, fsl_chan->srcid, ch_mux);
+               if (!edma_readl(fsl_chan->edma, fsl_chan->mux_addr))
+                       edma_writel(fsl_chan->edma, fsl_chan->srcid, fsl_chan->mux_addr);
        }
 
        val = edma_readl_chreg(fsl_chan, ch_csr);
@@ -134,7 +134,7 @@ static void fsl_edma3_disable_request(struct fsl_edma_chan *fsl_chan)
        flags = fsl_edma_drvflags(fsl_chan);
 
        if (flags & FSL_EDMA_DRV_HAS_CHMUX)
-               edma_writel_chreg(fsl_chan, 0, ch_mux);
+               edma_writel(fsl_chan->edma, 0, fsl_chan->mux_addr);
 
        val &= ~EDMA_V3_CH_CSR_ERQ;
        edma_writel_chreg(fsl_chan, val, ch_csr);

diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h
index fb45c7d4c1f4c9b830e5b75b63c1bd321469100c..4f39a548547a6e3e6d3b47b0ab83787fa7362fab 100644 (file)
--- a/drivers/dma/fsl-edma-common.h
+++ b/drivers/dma/fsl-edma-common.h
@@ -145,6 +145,7 @@ struct fsl_edma_chan {
        enum dma_data_direction         dma_dir;
        char                            chan_name[32];
        struct fsl_edma_hw_tcd __iomem *tcd;
+       void __iomem                    *mux_addr;
        u32                             real_count;
        struct work_struct              issue_worker;
        struct platform_device          *pdev;
@@ -206,6 +207,8 @@ struct fsl_edma_drvdata {
        u32                     chreg_off;
        u32                     chreg_space_sz;
        u32                     flags;
+       u32                     mux_off;        /* channel mux register offset */
+       u32                     mux_skip;       /* how much skip for each channel */
        int                     (*setup_irq)(struct platform_device *pdev,
                                             struct fsl_edma_engine *fsl_edma);
 };

diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c
index df3af5762adcff4da3949b4515f76e9c2714e339..bbdf8ff72f6510a47a9248a73035ce83bf878fa8 100644 (file)
--- a/drivers/dma/fsl-edma-main.c
+++ b/drivers/dma/fsl-edma-main.c
@@ -359,6 +359,8 @@ static struct fsl_edma_drvdata imx93_data4 = {
        .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_DMACLK | FSL_EDMA_DRV_EDMA4,
        .chreg_space_sz = 0x8000,
        .chreg_off = 0x10000,
+       .mux_off = 0x10000 + offsetof(struct fsl_edma3_ch_reg, ch_mux),
+       .mux_skip = 0x8000,
        .setup_irq = fsl_edma3_irq_init,
 };
 
@@ -532,6 +534,7 @@ static int fsl_edma_probe(struct platform_device *pdev)
                                offsetof(struct fsl_edma3_ch_reg, tcd) : 0;
                fsl_chan->tcd = fsl_edma->membase
                                + i * drvdata->chreg_space_sz + drvdata->chreg_off + len;
+               fsl_chan->mux_addr = fsl_edma->membase + drvdata->mux_off + i * drvdata->mux_skip;
 
                fsl_chan->pdev = pdev;
                vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev);