clk: renesas: r8a779g0: Add MSIOF clocks

Add the module clocks used by the Clock-Synchronized Serial Interfaces
with FIFO (MSIOF) on the Renesas R-Car V4H (R8A779G0) SoC.

Extracted from a larger patch in the BSP by Kazuya Mizuguchi.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/3cb2f1798145099a46134862c6bcbdcc29ca7410.1664204336.git.geert+renesas@glider.be

diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
index 8397996e1f47ad388cf481eb8a72f5ff56f0a29c..ae5e04eb93585d18e9c4acb7f80b8e24fbf46504 100644 (file)
--- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
@@ -163,6 +163,12 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
        DEF_MOD("i2c3",         521,    R8A779G0_CLK_S0D6_PER),
        DEF_MOD("i2c4",         522,    R8A779G0_CLK_S0D6_PER),
        DEF_MOD("i2c5",         523,    R8A779G0_CLK_S0D6_PER),
+       DEF_MOD("msi0",         618,    R8A779G0_CLK_MSO),
+       DEF_MOD("msi1",         619,    R8A779G0_CLK_MSO),
+       DEF_MOD("msi2",         620,    R8A779G0_CLK_MSO),
+       DEF_MOD("msi3",         621,    R8A779G0_CLK_MSO),
+       DEF_MOD("msi4",         622,    R8A779G0_CLK_MSO),
+       DEF_MOD("msi5",         623,    R8A779G0_CLK_MSO),
        DEF_MOD("sydm0",        709,    R8A779G0_CLK_S0D6_PER),
        DEF_MOD("sydm1",        710,    R8A779G0_CLK_S0D6_PER),
        DEF_MOD("wdt1:wdt0",    907,    R8A779G0_CLK_R),