s390/disassembler: add new z14 instructions

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>

diff --git a/arch/s390/kernel/dis.c b/arch/s390/kernel/dis.c
index c460e6049fb5ee2c5a011adbdf908395befd719e..94e96a7bd6d8f65f480caae6d2fee7268ca866b1 100644 (file)
--- a/arch/s390/kernel/dis.c
+++ b/arch/s390/kernel/dis.c
@@ -78,6 +78,7 @@ enum {
        U8_8,   /* 8 bit unsigned value starting at 8 */
        U8_16,  /* 8 bit unsigned value starting at 16 */
        U8_24,  /* 8 bit unsigned value starting at 24 */
+       U8_28,  /* 8 bit unsigned value starting at 28 */
        U8_32,  /* 8 bit unsigned value starting at 32 */
        I8_8,   /* 8 bit signed value starting at 8 */
        I8_16,  /* 8 bit signed value starting at 16 */
@@ -157,6 +158,10 @@ enum {
        INSTR_VRS_RVRDM,
        INSTR_VRV_VVRDM, INSTR_VRV_VWRDM,
        INSTR_VRX_VRRDM, INSTR_VRX_VRRD0,
+       INSTR_VSI_URDV, INSTR_VRS_RRDV, INSTR_VRI_V0UU2, INSTR_VRR_RV0U,
+       INSTR_VRI_VR0UU, INSTR_VRI_VVUUU2, INSTR_VRR_0V, INSTR_VRI_VVV0UU2,
+       INSTR_VRR_0VV0U, INSTR_VRR_VVV, INSTR_VRR_VVVU0UV,
+       INSTR_VRR_VVVUU0V, INSTR_VRR_VVV0UUU,
 };
 
 static const struct s390_operand operands[] =
@@ -207,6 +212,7 @@ static const struct s390_operand operands[] =
        [U8_8]   = {  8,  8, 0 },
        [U8_16]  = {  8, 16, 0 },
        [U8_24]  = {  8, 24, 0 },
+       [U8_28]  = {  8, 28, 0 },
        [U8_32]  = {  8, 32, 0 },
        [J12_12] = { 12, 12, OPERAND_PCREL },
        [I8_8]   = {  8,  8, OPERAND_SIGNED },
@@ -368,6 +374,19 @@ static const unsigned char formats[][7] = {
        [INSTR_VRV_VWRDM] = { 0xff, V_8,D_20,W_12,B_16,M_32,0 },
        [INSTR_VRX_VRRDM] = { 0xff, V_8,D_20,X_12,B_16,M_32,0 },
        [INSTR_VRX_VRRD0] = { 0xff, V_8,D_20,X_12,B_16,0,0 },
+       [INSTR_VRI_V0UU2] = {0xff, V_8,U16_16,U4_32,0,0,0 },
+       [INSTR_VRI_VR0UU] = {0xff, V_8,V_12,U8_28,U8_16,U4_24,0 },
+       [INSTR_VRI_VVUUU2]= {0xff, V_8,V_12,U8_28,U8_16,U4_24,0 },
+       [INSTR_VRI_VVV0UU2]= {0xff, V_8,V_12,V_16,U8_28,U4_24,0 },
+       [INSTR_VRR_0VV0U] = {0xff, V_12,V_16,U4_24,0,0,0 },
+       [INSTR_VRR_0V]    = {0xff, V_12,0,0,0,0,0 },
+       [INSTR_VRR_RV0U]  = {0xff, R_8,V_12,U4_24,0,0,0 },
+       [INSTR_VRR_VVV0UUU]= {0xff, V_8,V_12,V_16,U4_32,U4_28,U4_24 },
+       [INSTR_VRR_VVVU0UV]= {0xff, V_8,V_12,V_16,V_32,U4_28,U4_20 },
+       [INSTR_VRR_VVVUU0V]= {0xff, V_8,V_12,V_16,V_32,U4_20,U4_24 },
+       [INSTR_VRR_VVV]   = {0xff, V_8,V_12,V_16,0,0,0 },
+       [INSTR_VRS_RRDV]  = {0xff, V_32,R_12,D_20,B_16,0,0 },
+       [INSTR_VSI_URDV]  = {0xff, V_32,D_20,B_16,U8_8,0,0 },
 };
 
 enum {
@@ -452,7 +471,11 @@ enum {
        LONG_INSN_VESRAV,
        LONG_INSN_VESRLV,
        LONG_INSN_VSBCBI,
-       LONG_INSN_STCCTM
+       LONG_INSN_STCCTM,
+       LONG_INSN_MSGRKC,
+       LONG_INSN_LLGFSG,
+       LONG_INSN_VSTRLR,
+       LONG_INSN_VBPERM,
 };
 
 static char *long_insn_name[] = {
@@ -538,6 +561,10 @@ static char *long_insn_name[] = {
        [LONG_INSN_LOCGHI] = "locghi",
        [LONG_INSN_LOCHHI] = "lochhi",
        [LONG_INSN_STOCFH] = "stocfh",
+       [LONG_INSN_MSGRKC] = "msgrkc",
+       [LONG_INSN_LLGFSG] = "llgfsg",
+       [LONG_INSN_VSTRLR] = "vstrlr",
+       [LONG_INSN_VBPERM] = "vbperm",
 };
 
 static struct s390_insn opcode[] = {
@@ -1111,6 +1138,7 @@ static struct s390_insn opcode_b9[] = {
        { "sturg", 0x25, INSTR_RRE_RR },
        { "lbr", 0x26, INSTR_RRE_RR },
        { "lhr", 0x27, INSTR_RRE_RR },
+       { "kma", 0x29, INSTR_RRF_R0RR },
        { "cgfr", 0x30, INSTR_RRE_RR },
        { "clgfr", 0x31, INSTR_RRE_RR },
        { "ppno", 0x3c, INSTR_RRE_RR },
@@ -1183,6 +1211,8 @@ static struct s390_insn opcode_b9[] = {
        { "sgrk", 0xe9, INSTR_RRF_R0RR2 },
        { "algrk", 0xea, INSTR_RRF_R0RR2 },
        { "slgrk", 0xeb, INSTR_RRF_R0RR2 },
+       { "mgrk", 0xec, INSTR_RRF_R0RR2 },
+       { { 0, LONG_INSN_MSGRKC }, 0xed, INSTR_RRF_R0RR2 },
        { "locr", 0xf2, INSTR_RRF_M0RR },
        { "nrk", 0xf4, INSTR_RRF_R0RR2 },
        { "ork", 0xf6, INSTR_RRF_R0RR2 },
@@ -1191,6 +1221,7 @@ static struct s390_insn opcode_b9[] = {
        { "srk", 0xf9, INSTR_RRF_R0RR2 },
        { "alrk", 0xfa, INSTR_RRF_R0RR2 },
        { "slrk", 0xfb, INSTR_RRF_R0RR2 },
+       { "msrkc", 0xfd, INSTR_RRF_R0RR2 },
        { "kmac", 0x1e, INSTR_RRE_RR },
        { "lrvr", 0x1f, INSTR_RRE_RR },
        { "km", 0x2e, INSTR_RRE_RR },
@@ -1331,12 +1362,21 @@ static struct s390_insn opcode_e3[] = {
        { "ltgf", 0x32, INSTR_RXY_RRRD },
        { "cgh", 0x34, INSTR_RXY_RRRD },
        { "pfd", 0x36, INSTR_RXY_URRD },
+       { "agh", 0x38, INSTR_RXY_RRRD },
+       { "sgh", 0x39, INSTR_RXY_RRRD },
        { { 0, LONG_INSN_LLZRGF }, 0x3a, INSTR_RXY_RRRD },
        { "lzrf", 0x3b, INSTR_RXY_RRRD },
+       { "mgh", 0x3c, INSTR_RXY_RRRD },
        { "strvh", 0x3f, INSTR_RXY_RRRD },
        { "bctg", 0x46, INSTR_RXY_RRRD },
+       { "bic", 0x47, INSTR_RXY_URRD },
+       { { 0, LONG_INSN_LLGFSG }, 0x48, INSTR_RXY_RRRD },
+       { "stgsc", 0x49, INSTR_RXY_RRRD },
+       { "lgg", 0x4c, INSTR_RXY_RRRD },
+       { "lgsc", 0x4d, INSTR_RXY_RRRD },
        { "sty", 0x50, INSTR_RXY_RRRD },
        { "msy", 0x51, INSTR_RXY_RRRD },
+       { "msc", 0x53, INSTR_RXY_RRRD },
        { "ny", 0x54, INSTR_RXY_RRRD },
        { "cly", 0x55, INSTR_RXY_RRRD },
        { "oy", 0x56, INSTR_RXY_RRRD },
@@ -1363,6 +1403,8 @@ static struct s390_insn opcode_e3[] = {
        { "ng", 0x80, INSTR_RXY_RRRD },
        { "og", 0x81, INSTR_RXY_RRRD },
        { "xg", 0x82, INSTR_RXY_RRRD },
+       { "msgc", 0x83, INSTR_RXY_RRRD },
+       { "mg", 0x84, INSTR_RXY_RRRD },
        { "lgat", 0x85, INSTR_RXY_RRRD },
        { "mlg", 0x86, INSTR_RXY_RRRD },
        { "dlg", 0x87, INSTR_RXY_RRRD },
@@ -1420,6 +1462,32 @@ static struct s390_insn opcode_e5[] = {
        { "", 0, INSTR_INVALID }
 };
 
+static struct s390_insn opcode_e6[] = {
+       { "vpkz", 0x34, INSTR_VSI_URDV },
+       { "vlrl", 0x35, INSTR_VSI_URDV },
+       { "vlrlr", 0x37, INSTR_VRS_RRDV },
+       { "vupkz", 0x3c, INSTR_VSI_URDV },
+       { "vstrl", 0x3d, INSTR_VSI_URDV },
+       { {0 , LONG_INSN_VSTRLR }, 0x3f, INSTR_VRS_RRDV },
+       { "vlip", 0x49, INSTR_VRI_V0UU2 },
+       { "vcvb", 0x50, INSTR_VRR_RV0U },
+       { "vcvbg", 0x52, INSTR_VRR_RV0U },
+       { "vcvd", 0x58, INSTR_VRI_VR0UU },
+       { "vsrp", 0x59, INSTR_VRI_VVUUU2 },
+       { "vcvdg", 0x5a, INSTR_VRI_VR0UU },
+       { "vpsop", 0x5b, INSTR_VRI_VVUUU2 },
+       { "vtp", 0x5f, INSTR_VRR_0V },
+       { "vap", 0x71, INSTR_VRI_VVV0UU2 },
+       { "vsp", 0x73, INSTR_VRI_VVV0UU2 },
+       { "vcp", 0x77, INSTR_VRR_0VV0U },
+       { "vmp", 0x78, INSTR_VRI_VVV0UU2 },
+       { "vmsp", 0x79, INSTR_VRI_VVV0UU2 },
+       { "vdp", 0x7a, INSTR_VRI_VVV0UU2 },
+       { "vrp", 0x7b, INSTR_VRI_VVV0UU2 },
+       { "vsdp", 0x7e, INSTR_VRI_VVV0UU2 },
+       { "", 0, INSTR_INVALID }
+};
+
 static struct s390_insn opcode_e7[] = {
        { "lcbb", 0x27, INSTR_RXE_RRRDM },
        { "vgef", 0x13, INSTR_VRV_VVRDM },
@@ -1560,6 +1628,15 @@ static struct s390_insn opcode_e7[] = {
        { "vfsq", 0xce, INSTR_VRR_VV000MM },
        { "vfs", 0xe2, INSTR_VRR_VVV00MM },
        { "vftci", 0x4a, INSTR_VRI_VVIMM },
+       { "vnx", 0x6c, INSTR_VRR_VVV },
+       { "vnn", 0x6e, INSTR_VRR_VVV },
+       { "voc", 0x6f, INSTR_VRR_VVV },
+       { { 0, LONG_INSN_VBPERM }, 0x85, INSTR_VRR_VVV },
+       { "vfnms", 0x9e, INSTR_VRR_VVVU0UV },
+       { "vfnma", 0x9f, INSTR_VRR_VVVU0UV },
+       { "vmsl", 0xb8, INSTR_VRR_VVVUU0V },
+       { "vfmin", 0xee, INSTR_VRR_VVV0UUU },
+       { "vfmax", 0xef, INSTR_VRR_VVV0UUU },
        { "", 0, INSTR_INVALID }
 };
 
@@ -1850,6 +1927,10 @@ struct s390_insn *find_insn(unsigned char *code)
        case 0xe5:
                table = opcode_e5;
                break;
+       case 0xe6:
+               table = opcode_e6;
+               opfrag = code[5];
+               break;
        case 0xe7:
                table = opcode_e7;
                opfrag = code[5];