drm/i915/display: Remove intel_crtc_state->psr_vsc
authorJouni Högander <jouni.hogander@intel.com>
Wed, 20 Dec 2023 10:36:03 +0000 (12:36 +0200)
committerJouni Högander <jouni.hogander@intel.com>
Fri, 22 Dec 2023 06:14:15 +0000 (08:14 +0200)
There is no really need to have separate vsc for psr usage. Use
intel_crtc_state->infoframes.vsc instead.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Shawn Lee <shawn.c.lee@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231220103609.1384523-2-jouni.hogander@intel.com
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_psr.c

index 3fdd8a5179831288f1e10bc8d9161d8d23a7ba6a..bbdc2041a990c68f41bb6d2583e6d5a207b4175b 100644 (file)
@@ -1218,7 +1218,6 @@ struct intel_crtc_state {
        bool wm_level_disabled;
        u32 dc3co_exitline;
        u16 su_y_granularity;
-       struct drm_dp_vsc_sdp psr_vsc;
 
        /*
         * Frequence the dpll for the port should run at. Differs from the
index b6e2e70e129046040336012604f3955a12c3ce8f..9d5dc3fb6f20d6af77d81f5c35da14faeb2a4927 100644 (file)
@@ -1380,7 +1380,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 
        crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
        intel_dp_compute_psr_vsc_sdp(intel_dp, crtc_state, conn_state,
-                                    &crtc_state->psr_vsc);
+                                    &crtc_state->infoframes.vsc);
 }
 
 void intel_psr_get_config(struct intel_encoder *encoder,
@@ -1652,7 +1652,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
                drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
                            intel_dp->psr.psr2_enabled ? "2" : "1");
 
-       intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->psr_vsc);
+       intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->infoframes.vsc);
        intel_snps_phy_update_psr_power_state(dev_priv, phy, true);
        intel_psr_enable_sink(intel_dp);
        intel_psr_enable_source(intel_dp, crtc_state);