riscv: dts: starfive: Add USB dts node for JH7110

Add USB wrapper layer and Cadence USB3 controller dts
configuration for StarFive JH7110 SoC and VisionFive2
Board.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 5feff4673503970551b3d3edb9a6898616d306f1..36c402b4a726cdfdaa6d0c32385bad13c8239a08 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -273,6 +273,11 @@
        status = "okay";
 };
 
+&usb0 {
+       dr_mode = "peripheral";
+       status = "okay";
+};
+
 &U74_1 {
        cpu-supply = <&vdd_cpu>;
 };

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index dbc1243a0e752a1db8d93d8f65b75bd1130ed6e6..c58489468cad52eb6cd563c83255603144702c87 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -446,6 +446,38 @@
                        status = "disabled";
                };
 
+               usb0: usb@10100000 {
+                       compatible = "starfive,jh7110-usb";
+                       ranges = <0x0 0x0 0x10100000 0x100000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       starfive,stg-syscon = <&stg_syscon 0x4>;
+                       clocks = <&stgcrg JH7110_STGCLK_USB0_LPM>,
+                                <&stgcrg JH7110_STGCLK_USB0_STB>,
+                                <&stgcrg JH7110_STGCLK_USB0_APB>,
+                                <&stgcrg JH7110_STGCLK_USB0_AXI>,
+                                <&stgcrg JH7110_STGCLK_USB0_UTMI_APB>;
+                       clock-names = "lpm", "stb", "apb", "axi", "utmi_apb";
+                       resets = <&stgcrg JH7110_STGRST_USB0_PWRUP>,
+                                <&stgcrg JH7110_STGRST_USB0_APB>,
+                                <&stgcrg JH7110_STGRST_USB0_AXI>,
+                                <&stgcrg JH7110_STGRST_USB0_UTMI_APB>;
+                       reset-names = "pwrup", "apb", "axi", "utmi_apb";
+                       status = "disabled";
+
+                       usb_cdns3: usb@0 {
+                               compatible = "cdns,usb3";
+                               reg = <0x0 0x10000>,
+                                     <0x10000 0x10000>,
+                                     <0x20000 0x10000>;
+                               reg-names = "otg", "xhci", "dev";
+                               interrupts = <100>, <108>, <110>;
+                               interrupt-names = "host", "peripheral", "otg";
+                               phys = <&usbphy0>;
+                               phy-names = "cdns3,usb2-phy";
+                       };
+               };
+
                usbphy0: phy@10200000 {
                        compatible = "starfive,jh7110-usb-phy";
                        reg = <0x0 0x10200000 0x0 0x10000>;