&r_apb2_rsb_clk.common,
&r_apb1_ir_clk.common,
&r_apb1_w1_clk.common,
- &ir_clk.common,
- &w1_clk.common,
-};
-
-static struct ccu_common *sun50i_h616_r_ccu_clks[] = {
- &r_apb1_clk.common,
- &r_apb2_clk.common,
- &r_apb1_twd_clk.common,
- &r_apb2_i2c_clk.common,
- &r_apb2_rsb_clk.common,
- &r_apb1_ir_clk.common,
&r_apb1_rtc_clk.common,
&ir_clk.common,
+ &w1_clk.common,
};
static struct clk_hw_onecell_data sun50i_h6_r_hw_clks = {
};
static const struct sunxi_ccu_desc sun50i_h616_r_ccu_desc = {
- .ccu_clks = sun50i_h616_r_ccu_clks,
- .num_ccu_clks = ARRAY_SIZE(sun50i_h616_r_ccu_clks),
+ .ccu_clks = sun50i_h6_r_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun50i_h6_r_ccu_clks),
.hw_clks = &sun50i_h616_r_hw_clks,
static SUNXI_CCU_M(rot_div_a83_clk, "rot-div", "pll-de", 0x0c, 0x0c, 4,
CLK_SET_RATE_PARENT);
-static struct ccu_common *sun8i_a83t_de2_clks[] = {
+static struct ccu_common *sun8i_de2_ccu_clks[] = {
&mixer0_clk.common,
&mixer1_clk.common,
&wb_clk.common,
-
- &bus_mixer0_clk.common,
- &bus_mixer1_clk.common,
- &bus_wb_clk.common,
-
- &mixer0_div_a83_clk.common,
- &mixer1_div_a83_clk.common,
- &wb_div_a83_clk.common,
-
- &bus_rot_clk.common,
&rot_clk.common,
- &rot_div_a83_clk.common,
-};
-
-static struct ccu_common *sun8i_h3_de2_clks[] = {
- &mixer0_clk.common,
- &mixer1_clk.common,
- &wb_clk.common,
-
- &bus_mixer0_clk.common,
- &bus_mixer1_clk.common,
- &bus_wb_clk.common,
-
- &mixer0_div_clk.common,
- &mixer1_div_clk.common,
- &wb_div_clk.common,
-};
-
-static struct ccu_common *sun8i_v3s_de2_clks[] = {
- &mixer0_clk.common,
- &wb_clk.common,
-
- &bus_mixer0_clk.common,
- &bus_wb_clk.common,
-
- &mixer0_div_clk.common,
- &wb_div_clk.common,
-};
-
-static struct ccu_common *sun50i_a64_de2_clks[] = {
- &mixer0_clk.common,
- &mixer1_clk.common,
- &wb_clk.common,
&bus_mixer0_clk.common,
&bus_mixer1_clk.common,
&bus_wb_clk.common,
+ &bus_rot_clk.common,
&mixer0_div_clk.common,
&mixer1_div_clk.common,
&wb_div_clk.common,
-
- &bus_rot_clk.common,
- &rot_clk.common,
&rot_div_clk.common,
+
+ &mixer0_div_a83_clk.common,
+ &mixer1_div_a83_clk.common,
+ &wb_div_a83_clk.common,
+ &rot_div_a83_clk.common,
};
static struct clk_hw_onecell_data sun8i_a83t_de2_hw_clks = {
};
static const struct sunxi_ccu_desc sun8i_a83t_de2_clk_desc = {
- .ccu_clks = sun8i_a83t_de2_clks,
- .num_ccu_clks = ARRAY_SIZE(sun8i_a83t_de2_clks),
+ .ccu_clks = sun8i_de2_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_de2_ccu_clks),
.hw_clks = &sun8i_a83t_de2_hw_clks,
};
static const struct sunxi_ccu_desc sun8i_h3_de2_clk_desc = {
- .ccu_clks = sun8i_h3_de2_clks,
- .num_ccu_clks = ARRAY_SIZE(sun8i_h3_de2_clks),
+ .ccu_clks = sun8i_de2_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_de2_ccu_clks),
.hw_clks = &sun8i_h3_de2_hw_clks,
};
static const struct sunxi_ccu_desc sun8i_r40_de2_clk_desc = {
- .ccu_clks = sun50i_a64_de2_clks,
- .num_ccu_clks = ARRAY_SIZE(sun50i_a64_de2_clks),
+ .ccu_clks = sun8i_de2_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_de2_ccu_clks),
.hw_clks = &sun50i_a64_de2_hw_clks,
};
static const struct sunxi_ccu_desc sun8i_v3s_de2_clk_desc = {
- .ccu_clks = sun8i_v3s_de2_clks,
- .num_ccu_clks = ARRAY_SIZE(sun8i_v3s_de2_clks),
+ .ccu_clks = sun8i_de2_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_de2_ccu_clks),
.hw_clks = &sun8i_v3s_de2_hw_clks,
};
static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc = {
- .ccu_clks = sun50i_a64_de2_clks,
- .num_ccu_clks = ARRAY_SIZE(sun50i_a64_de2_clks),
+ .ccu_clks = sun8i_de2_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_de2_ccu_clks),
.hw_clks = &sun50i_a64_de2_hw_clks,
};
static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = {
- .ccu_clks = sun8i_h3_de2_clks,
- .num_ccu_clks = ARRAY_SIZE(sun8i_h3_de2_clks),
+ .ccu_clks = sun8i_de2_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_de2_ccu_clks),
.hw_clks = &sun8i_h3_de2_hw_clks,
&bus_uart2_clk.common,
&bus_uart3_clk.common,
&bus_scr0_clk.common,
+ &bus_scr1_clk.common,
&bus_ephy_clk.common,
&bus_dbg_clk.common,
&ths_clk.common,
&gpu_clk.common,
};
-static struct ccu_common *sun50i_h5_ccu_clks[] = {
- &pll_cpux_clk.common,
- &pll_audio_base_clk.common,
- &pll_video_clk.common,
- &pll_ve_clk.common,
- &pll_ddr_clk.common,
- &pll_periph0_clk.common,
- &pll_gpu_clk.common,
- &pll_periph1_clk.common,
- &pll_de_clk.common,
- &cpux_clk.common,
- &axi_clk.common,
- &ahb1_clk.common,
- &apb1_clk.common,
- &apb2_clk.common,
- &ahb2_clk.common,
- &bus_ce_clk.common,
- &bus_dma_clk.common,
- &bus_mmc0_clk.common,
- &bus_mmc1_clk.common,
- &bus_mmc2_clk.common,
- &bus_nand_clk.common,
- &bus_dram_clk.common,
- &bus_emac_clk.common,
- &bus_ts_clk.common,
- &bus_hstimer_clk.common,
- &bus_spi0_clk.common,
- &bus_spi1_clk.common,
- &bus_otg_clk.common,
- &bus_ehci0_clk.common,
- &bus_ehci1_clk.common,
- &bus_ehci2_clk.common,
- &bus_ehci3_clk.common,
- &bus_ohci0_clk.common,
- &bus_ohci1_clk.common,
- &bus_ohci2_clk.common,
- &bus_ohci3_clk.common,
- &bus_ve_clk.common,
- &bus_tcon0_clk.common,
- &bus_tcon1_clk.common,
- &bus_deinterlace_clk.common,
- &bus_csi_clk.common,
- &bus_tve_clk.common,
- &bus_hdmi_clk.common,
- &bus_de_clk.common,
- &bus_gpu_clk.common,
- &bus_msgbox_clk.common,
- &bus_spinlock_clk.common,
- &bus_codec_clk.common,
- &bus_spdif_clk.common,
- &bus_pio_clk.common,
- &bus_ths_clk.common,
- &bus_i2s0_clk.common,
- &bus_i2s1_clk.common,
- &bus_i2s2_clk.common,
- &bus_i2c0_clk.common,
- &bus_i2c1_clk.common,
- &bus_i2c2_clk.common,
- &bus_uart0_clk.common,
- &bus_uart1_clk.common,
- &bus_uart2_clk.common,
- &bus_uart3_clk.common,
- &bus_scr0_clk.common,
- &bus_scr1_clk.common,
- &bus_ephy_clk.common,
- &bus_dbg_clk.common,
- &ths_clk.common,
- &nand_clk.common,
- &mmc0_clk.common,
- &mmc1_clk.common,
- &mmc2_clk.common,
- &ts_clk.common,
- &ce_clk.common,
- &spi0_clk.common,
- &spi1_clk.common,
- &i2s0_clk.common,
- &i2s1_clk.common,
- &i2s2_clk.common,
- &spdif_clk.common,
- &usb_phy0_clk.common,
- &usb_phy1_clk.common,
- &usb_phy2_clk.common,
- &usb_phy3_clk.common,
- &usb_ohci0_clk.common,
- &usb_ohci1_clk.common,
- &usb_ohci2_clk.common,
- &usb_ohci3_clk.common,
- &dram_clk.common,
- &dram_ve_clk.common,
- &dram_csi_clk.common,
- &dram_deinterlace_clk.common,
- &dram_ts_clk.common,
- &de_clk.common,
- &tcon_clk.common,
- &tve_clk.common,
- &deinterlace_clk.common,
- &csi_misc_clk.common,
- &csi_sclk_clk.common,
- &csi_mclk_clk.common,
- &ve_clk.common,
- &ac_dig_clk.common,
- &avs_clk.common,
- &hdmi_clk.common,
- &hdmi_ddc_clk.common,
- &mbus_clk.common,
- &gpu_clk.common,
-};
-
static const struct clk_hw *clk_parent_pll_audio[] = {
&pll_audio_base_clk.common.hw
};
};
static const struct sunxi_ccu_desc sun50i_h5_ccu_desc = {
- .ccu_clks = sun50i_h5_ccu_clks,
- .num_ccu_clks = ARRAY_SIZE(sun50i_h5_ccu_clks),
+ .ccu_clks = sun8i_h3_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_h3_ccu_clks),
.hw_clks = &sun50i_h5_hw_clks,
},
};
-static struct ccu_common *sun8i_a83t_r_ccu_clks[] = {
- &ar100_clk.common,
- &apb0_clk.common,
- &apb0_pio_clk.common,
- &apb0_ir_clk.common,
- &apb0_timer_clk.common,
- &apb0_rsb_clk.common,
- &apb0_uart_clk.common,
- &apb0_i2c_clk.common,
- &apb0_twd_clk.common,
- &a83t_ir_clk.common,
-};
-
-static struct ccu_common *sun8i_h3_r_ccu_clks[] = {
- &ar100_clk.common,
- &apb0_clk.common,
- &apb0_pio_clk.common,
- &apb0_ir_clk.common,
- &apb0_timer_clk.common,
- &apb0_uart_clk.common,
- &apb0_i2c_clk.common,
- &apb0_twd_clk.common,
- &ir_clk.common,
-};
-
-static struct ccu_common *sun50i_a64_r_ccu_clks[] = {
+static struct ccu_common *sun8i_r_ccu_clks[] = {
&ar100_clk.common,
&apb0_clk.common,
&apb0_pio_clk.common,
&apb0_i2c_clk.common,
&apb0_twd_clk.common,
&ir_clk.common,
+ &a83t_ir_clk.common,
};
static struct clk_hw_onecell_data sun8i_a83t_r_hw_clks = {
};
static const struct sunxi_ccu_desc sun8i_a83t_r_ccu_desc = {
- .ccu_clks = sun8i_a83t_r_ccu_clks,
- .num_ccu_clks = ARRAY_SIZE(sun8i_a83t_r_ccu_clks),
+ .ccu_clks = sun8i_r_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_r_ccu_clks),
.hw_clks = &sun8i_a83t_r_hw_clks,
};
static const struct sunxi_ccu_desc sun8i_h3_r_ccu_desc = {
- .ccu_clks = sun8i_h3_r_ccu_clks,
- .num_ccu_clks = ARRAY_SIZE(sun8i_h3_r_ccu_clks),
+ .ccu_clks = sun8i_r_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_r_ccu_clks),
.hw_clks = &sun8i_h3_r_hw_clks,
};
static const struct sunxi_ccu_desc sun50i_a64_r_ccu_desc = {
- .ccu_clks = sun50i_a64_r_ccu_clks,
- .num_ccu_clks = ARRAY_SIZE(sun50i_a64_r_ccu_clks),
+ .ccu_clks = sun8i_r_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_r_ccu_clks),
.hw_clks = &sun50i_a64_r_hw_clks,
&bus_de_clk.common,
&bus_codec_clk.common,
&bus_pio_clk.common,
+ &bus_i2s0_clk.common,
&bus_i2c0_clk.common,
&bus_i2c1_clk.common,
&bus_uart0_clk.common,
&mmc2_output_clk.common,
&ce_clk.common,
&spi0_clk.common,
+ &i2s0_clk.common,
&usb_phy0_clk.common,
&usb_ohci0_clk.common,
&dram_clk.common,
&pll_audio_base_clk.common.hw
};
-static struct ccu_common *sun8i_v3_ccu_clks[] = {
- &pll_cpu_clk.common,
- &pll_audio_base_clk.common,
- &pll_video_clk.common,
- &pll_ve_clk.common,
- &pll_ddr0_clk.common,
- &pll_periph0_clk.common,
- &pll_isp_clk.common,
- &pll_periph1_clk.common,
- &pll_ddr1_clk.common,
- &cpu_clk.common,
- &axi_clk.common,
- &ahb1_clk.common,
- &apb1_clk.common,
- &apb2_clk.common,
- &ahb2_clk.common,
- &bus_ce_clk.common,
- &bus_dma_clk.common,
- &bus_mmc0_clk.common,
- &bus_mmc1_clk.common,
- &bus_mmc2_clk.common,
- &bus_dram_clk.common,
- &bus_emac_clk.common,
- &bus_hstimer_clk.common,
- &bus_spi0_clk.common,
- &bus_otg_clk.common,
- &bus_ehci0_clk.common,
- &bus_ohci0_clk.common,
- &bus_ve_clk.common,
- &bus_tcon0_clk.common,
- &bus_csi_clk.common,
- &bus_de_clk.common,
- &bus_codec_clk.common,
- &bus_pio_clk.common,
- &bus_i2s0_clk.common,
- &bus_i2c0_clk.common,
- &bus_i2c1_clk.common,
- &bus_uart0_clk.common,
- &bus_uart1_clk.common,
- &bus_uart2_clk.common,
- &bus_ephy_clk.common,
- &bus_dbg_clk.common,
- &mmc0_clk.common,
- &mmc0_sample_clk.common,
- &mmc0_output_clk.common,
- &mmc1_clk.common,
- &mmc1_sample_clk.common,
- &mmc1_output_clk.common,
- &mmc2_clk.common,
- &mmc2_sample_clk.common,
- &mmc2_output_clk.common,
- &ce_clk.common,
- &spi0_clk.common,
- &i2s0_clk.common,
- &usb_phy0_clk.common,
- &usb_ohci0_clk.common,
- &dram_clk.common,
- &dram_ve_clk.common,
- &dram_csi_clk.common,
- &dram_ohci_clk.common,
- &dram_ehci_clk.common,
- &de_clk.common,
- &tcon_clk.common,
- &csi_misc_clk.common,
- &csi0_mclk_clk.common,
- &csi1_sclk_clk.common,
- &csi1_mclk_clk.common,
- &ve_clk.common,
- &ac_dig_clk.common,
- &avs_clk.common,
- &mbus_clk.common,
- &mipi_csi_clk.common,
-};
-
/* We hardcode the divider to 1 for SDM support */
static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio",
clk_parent_pll_audio,
};
static const struct sunxi_ccu_desc sun8i_v3_ccu_desc = {
- .ccu_clks = sun8i_v3_ccu_clks,
- .num_ccu_clks = ARRAY_SIZE(sun8i_v3_ccu_clks),
+ .ccu_clks = sun8i_v3s_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_v3s_ccu_clks),
.hw_clks = &sun8i_v3_hw_clks,