drm/i915: pass dev_priv explicitly to PALETTE

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PALETTE register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/bf07d29cefef23ebd5d54fbb0d3bf7e41d132d93.1714399071.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index ca7112b32cb3efd4d71bbeeb3753f5afacefd125..edb805fc9c9705599be86b7e12e80a3bc86dc197 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1227,7 +1227,7 @@ static void i9xx_load_lut_8(struct intel_crtc *crtc,
        lut = blob->data;
 
        for (i = 0; i < 256; i++)
-               intel_de_write_fw(dev_priv, PALETTE(pipe, i),
+               intel_de_write_fw(dev_priv, PALETTE(dev_priv, pipe, i),
                                  i9xx_lut_8(&lut[i]));
 }
 
@@ -1240,9 +1240,11 @@ static void i9xx_load_lut_10(struct intel_crtc *crtc,
        enum pipe pipe = crtc->pipe;
 
        for (i = 0; i < lut_size - 1; i++) {
-               intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 0),
+               intel_de_write_fw(dev_priv,
+                                 PALETTE(dev_priv, pipe, 2 * i + 0),
                                  i9xx_lut_10_ldw(&lut[i]));
-               intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 1),
+               intel_de_write_fw(dev_priv,
+                                 PALETTE(dev_priv, pipe, 2 * i + 1),
                                  i9xx_lut_10_udw(&lut[i]));
        }
 }
@@ -1274,9 +1276,11 @@ static void i965_load_lut_10p6(struct intel_crtc *crtc,
        enum pipe pipe = crtc->pipe;
 
        for (i = 0; i < lut_size - 1; i++) {
-               intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 0),
+               intel_de_write_fw(dev_priv,
+                                 PALETTE(dev_priv, pipe, 2 * i + 0),
                                  i965_lut_10p6_ldw(&lut[i]));
-               intel_de_write_fw(dev_priv, PALETTE(pipe, 2 * i + 1),
+               intel_de_write_fw(dev_priv,
+                                 PALETTE(dev_priv, pipe, 2 * i + 1),
                                  i965_lut_10p6_udw(&lut[i]));
        }
 
@@ -3150,7 +3154,8 @@ static struct drm_property_blob *i9xx_read_lut_8(struct intel_crtc *crtc)
        lut = blob->data;
 
        for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
-               u32 val = intel_de_read_fw(dev_priv, PALETTE(pipe, i));
+               u32 val = intel_de_read_fw(dev_priv,
+                                          PALETTE(dev_priv, pipe, i));
 
                i9xx_lut_8_pack(&lut[i], val);
        }
@@ -3176,8 +3181,10 @@ static struct drm_property_blob *i9xx_read_lut_10(struct intel_crtc *crtc)
        lut = blob->data;
 
        for (i = 0; i < lut_size - 1; i++) {
-               ldw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 0));
-               udw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 1));
+               ldw = intel_de_read_fw(dev_priv,
+                                      PALETTE(dev_priv, pipe, 2 * i + 0));
+               udw = intel_de_read_fw(dev_priv,
+                                      PALETTE(dev_priv, pipe, 2 * i + 1));
 
                i9xx_lut_10_pack(&lut[i], ldw, udw);
        }
@@ -3224,8 +3231,10 @@ static struct drm_property_blob *i965_read_lut_10p6(struct intel_crtc *crtc)
        lut = blob->data;
 
        for (i = 0; i < lut_size - 1; i++) {
-               u32 ldw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 0));
-               u32 udw = intel_de_read_fw(dev_priv, PALETTE(pipe, 2 * i + 1));
+               u32 ldw = intel_de_read_fw(dev_priv,
+                                          PALETTE(dev_priv, pipe, 2 * i + 0));
+               u32 udw = intel_de_read_fw(dev_priv,
+                                          PALETTE(dev_priv, pipe, 2 * i + 1));
 
                i965_lut_10p6_pack(&lut[i], ldw, udw);
        }

diff --git a/drivers/gpu/drm/i915/display/intel_color_regs.h b/drivers/gpu/drm/i915/display/intel_color_regs.h
index 02033c882d7f8aac09b381ea81f6a97d88c74900..250ceffbd481b26ad5c53a38d5dae1c7af13f589 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_color_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_color_regs.h
@@ -30,7 +30,7 @@
 #define   PALETTE_10BIT_BLUE_EXP_MASK  REG_GENMASK(7, 6)
 #define   PALETTE_10BIT_BLUE_MANT_MASK REG_GENMASK(5, 2)
 #define   PALETTE_10BIT_BLUE_UDW_MASK  REG_GENMASK(1, 0)
-#define PALETTE(pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) +                   \
+#define PALETTE(dev_priv, pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) +                 \
                               _PICK_EVEN_2RANGES(pipe, 2,                      \
                                                  _PALETTE_A, _PALETTE_B,       \
                                                  _CHV_PALETTE_C, _CHV_PALETTE_C) + \