drm/amdgpu/gmc9: disable partial wr rmw if ECC is not enabled
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 10 May 2018 20:15:12 +0000 (15:15 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 24 May 2018 04:51:22 +0000 (23:51 -0500)
The vbios mistakenly sets this bit on some boards without ECC.
This can lead to reduced performance in some workloads.  Disable
the bit if the board does not have ECC.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index b60ed288d3149bf80251d2e64f9f465c601ce7e2..3c0a85d4e4ab9b513ec2681ab199659bba6e1bf3 100644 (file)
@@ -675,6 +675,7 @@ static int gmc_v9_0_late_init(void *handle)
                        DRM_INFO("ECC is active.\n");
                } else if (r == 0) {
                        DRM_INFO("ECC is not present.\n");
+                       adev->df_funcs->enable_ecc_force_par_wr_rmw(adev, false);
                } else {
                        DRM_ERROR("gmc_v9_0_ecc_available() failed. r: %d\n", r);
                        return r;