drm/msm/dpu: inline DSPP_BLK macros
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Mon, 10 Jul 2023 23:49:57 +0000 (02:49 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 11 Jul 2023 16:26:41 +0000 (19:26 +0300)
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.

Tested-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/545359/
Link: https://lore.kernel.org/r/20230704022136.130522-12-dmitry.baryshkov@linaro.org
16 files changed:
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

index fd0081469a82ace11c4a766ab7a529bbaf49597d..6b254753774c5639bcc49a57b0cd2e0a8889c04a 100644 (file)
@@ -174,10 +174,17 @@ static const struct dpu_dsc_cfg msm8998_dsc[] = {
 };
 
 static const struct dpu_dspp_cfg msm8998_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &msm8998_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &msm8998_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &msm8998_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &msm8998_dspp_sblk,
+       },
 };
 
 static const struct dpu_intf_cfg msm8998_intf[] = {
index 9fd68a483cd036f38af61164e04f58ee843aedd1..1562dcb839a2cc0a308bf457686cc707c14755ce 100644 (file)
@@ -152,14 +152,27 @@ static const struct dpu_lm_cfg sdm845_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sdm845_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sdm845_pp[] = {
index 9c5e565842dc7951b7f7520c276846ae3d9cfa23..a31dbe024c6e86fa82be566b621f67498c69b95b 100644 (file)
@@ -161,14 +161,27 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8150_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm8150_pp[] = {
index 1e7eed115e0e0d5c196989c7c75442db735a0256..4e59f266ed131929ce799b3a7863fae5d4a70fc9 100644 (file)
@@ -160,14 +160,27 @@ static const struct dpu_lm_cfg sc8180x_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sc8180x_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sc8180x_pp[] = {
index 23d4b59a544a8d7759e61c985d63e0c9dc049336..17e4545668ab6c71d67f97da12879596dec60e35 100644 (file)
@@ -161,14 +161,27 @@ static const struct dpu_lm_cfg sm8250_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8250_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm8250_pp[] = {
index 38225af23c0f5420da60b121ec29cdcd486e0c26..671ff10fe3df06eb5cffe70bb0988917e2a4e09d 100644 (file)
@@ -97,8 +97,12 @@ static const struct dpu_lm_cfg sc7180_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sc7180_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sc7180_pp[] = {
index 356ea6144aa9c8127015290e299233907b291e4a..4ae537784cc89bfb5e78c57232ddabff4458785a 100644 (file)
@@ -67,8 +67,12 @@ static const struct dpu_lm_cfg sm6115_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm6115_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm6115_pp[] = {
index b1b027fa16f720c98021e4c54d6ddbfb41eaaba2..c640e453e6c6a2a91c5c364214ecf1851b9e5ddd 100644 (file)
@@ -105,8 +105,12 @@ static const struct dpu_lm_cfg sm6350_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm6350_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-               &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static struct dpu_pingpong_cfg sm6350_pp[] = {
index c1181f89d6a5079a871c09b71900f716ac0f6583..df6b0743676b396e2503a58d5f0b1321aaaa2a49 100644 (file)
@@ -64,8 +64,12 @@ static const struct dpu_lm_cfg qcm2290_lm[] = {
 };
 
 static const struct dpu_dspp_cfg qcm2290_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg qcm2290_pp[] = {
index 1dd7771b55f884aeaee276319ee268978cc46fdf..6536a17724f99b483568025aaa92523d3aba03c7 100644 (file)
@@ -68,8 +68,12 @@ static const struct dpu_lm_cfg sm6375_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm6375_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-               &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm6375_pp[] = {
index 1515c5e09a6e18dc15947b3506a9ec5c0f70acfd..68b7a74349651de25aaa08c27519d2b6cc8b10cd 100644 (file)
@@ -159,14 +159,27 @@ static const struct dpu_lm_cfg sm8350_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8350_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm8350_pp[] = {
index f7bd14fd82e8323311aa31f282ab0c27ab70c133..b7771e987c8bc05f3d250969766f8ca037028617 100644 (file)
@@ -105,8 +105,12 @@ static const struct dpu_lm_cfg sc7280_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sc7280_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sc7280_pp[] = {
index f532e9e5de1a7a274f5be5dfa8d796ef4835643d..580fcb612187e7464d5dd919f44cb9ed509dfbec 100644 (file)
@@ -155,14 +155,27 @@ static const struct dpu_lm_cfg sc8280xp_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sc8280xp_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sc8280xp_pp[] = {
index 62aa7851b4cc69bb96f496429a3b72dfbbb1d049..816067e0292d44bf69c2616c9a789ec25d54e075 100644 (file)
@@ -161,14 +161,27 @@ static const struct dpu_lm_cfg sm8450_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8450_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 
 static const struct dpu_pingpong_cfg sm8450_pp[] = {
index 7d311fceef6ab5d3b4346ca38e1784cd9d4b9060..807f382608012637c4eba3bef17aea65eaacc7cb 100644 (file)
@@ -178,14 +178,27 @@ static const struct dpu_lm_cfg sm8550_lm[] = {
 };
 
 static const struct dpu_dspp_cfg sm8550_dspp[] = {
-       DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
-       DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
-                &sdm845_dspp_sblk),
+       {
+               .name = "dspp_0", .id = DSPP_0,
+               .base = 0x54000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_1", .id = DSPP_1,
+               .base = 0x56000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_2", .id = DSPP_2,
+               .base = 0x58000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       }, {
+               .name = "dspp_3", .id = DSPP_3,
+               .base = 0x5a000, .len = 0x1800,
+               .features = DSPP_SC7180_MASK,
+               .sblk = &sdm845_dspp_sblk,
+       },
 };
 static const struct dpu_pingpong_cfg sm8550_pp[] = {
        PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,
index d7b5a1a003512bc9ec5334b26a8943b84bfe422e..44a82226fbf9e86c216ba66807240a308dc69eca 100644 (file)
@@ -441,14 +441,6 @@ static const struct dpu_dspp_sub_blks sdm845_dspp_sblk = {
                .len = 0x90, .version = 0x40000},
 };
 
-#define DSPP_BLK(_name, _id, _base, _mask, _sblk) \
-               {\
-               .name = _name, .id = _id, \
-               .base = _base, .len = 0x1800, \
-               .features = _mask, \
-               .sblk = _sblk \
-               }
-
 /*************************************************************
  * PINGPONG sub blocks config
  *************************************************************/