nvme-pci: slimmer CQ head update
authorAlexey Dobriyan <adobriyan@gmail.com>
Fri, 28 Feb 2020 18:45:19 +0000 (21:45 +0300)
committerKeith Busch <kbusch@kernel.org>
Wed, 25 Mar 2020 19:48:06 +0000 (04:48 +0900)
Update CQ head with pre-increment operator. This saves subtraction of 1
and a few registers.

Also update phase with "^= 1". This generates only one RMW instruction.

ffffffff815ba150 <nvme_update_cq_head>:
ffffffff815ba150:       0f b7 47 70             movzx  eax,WORD PTR [rdi+0x70]
ffffffff815ba154:       83 c0 01                add    eax,0x1
ffffffff815ba157:       66 89 47 70             mov    WORD PTR [rdi+0x70],ax
ffffffff815ba15b:       66 3b 47 68             cmp    ax,WORD PTR [rdi+0x68]
ffffffff815ba15f:       74 01                   je     ffffffff815ba162 <nvme_update_cq_head+0x12>
ffffffff815ba161:       c3                      ret
ffffffff815ba162:       31 c0                   xor    eax,eax
ffffffff815ba164:       80 77 74 01      ===>   xor    BYTE PTR [rdi+0x74],0x1
ffffffff815ba168:       66 89 47 70             mov    WORD PTR [rdi+0x70],ax
ffffffff815ba16c:       c3                      ret

add/remove: 0/0 grow/shrink: 0/3 up/down: 0/-119 (-119)
Function                                     old     new   delta
nvme_poll                                    690     678     -12
nvme_dev_disable                            1230    1177     -53
nvme_irq                                     613     559     -54

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
drivers/nvme/host/pci.c

index d3f23d6254e47a4d1a2cfd53323a327aca17c013..cdc9b6149d3828c4659b53806fac3636f8bc34e5 100644 (file)
@@ -982,11 +982,9 @@ static void nvme_complete_cqes(struct nvme_queue *nvmeq, u16 start, u16 end)
 
 static inline void nvme_update_cq_head(struct nvme_queue *nvmeq)
 {
-       if (nvmeq->cq_head == nvmeq->q_depth - 1) {
+       if (++nvmeq->cq_head == nvmeq->q_depth) {
                nvmeq->cq_head = 0;
-               nvmeq->cq_phase = !nvmeq->cq_phase;
-       } else {
-               nvmeq->cq_head++;
+               nvmeq->cq_phase ^= 1;
        }
 }