ARM: zynq: dts: Add SCL & SDA GPIO entries for recovery
authorChirag Parekh <chiragp@xilinx.com>
Tue, 2 May 2023 13:52:41 +0000 (15:52 +0200)
committerMichal Simek <michal.simek@amd.com>
Tue, 16 May 2023 11:12:52 +0000 (13:12 +0200)
Wire i2c pinmuxing gpio recovery for zc702.

Signed-off-by: Chirag Parekh <chiragp@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5eb73d1150648e782795e35c30fccb983b3e0db7.1683035557.git.michal.simek@amd.com
arch/arm/boot/dts/zynq-zc702.dts

index d23201ba8cd7d1282d4b7525558512e87f65751f..6efdbca9d3efb924900b450fa0d95a6ad521fb3a 100644 (file)
@@ -5,6 +5,7 @@
  */
 /dts-v1/;
 #include "zynq-7000.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
        model = "Xilinx ZC702 board";
 &i2c0 {
        status = "okay";
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c0_default>;
+       pinctrl-1 = <&pinctrl_i2c0_gpio>;
+       scl-gpios = <&gpio0 50 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio0 51 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 
        i2c-mux@74 {
                compatible = "nxp,pca9548";
                };
        };
 
+       pinctrl_i2c0_gpio: i2c0-gpio {
+               mux {
+                       groups = "gpio0_50_grp", "gpio0_51_grp";
+                       function = "gpio0";
+               };
+
+               conf {
+                       groups = "gpio0_50_grp", "gpio0_51_grp";
+                       slew-rate = <0>;
+                       io-standard = <1>;
+               };
+       };
+
        pinctrl_sdhci0_default: sdhci0-default {
                mux {
                        groups = "sdio0_2_grp";