drm/xe: Update LRC context layout definitions
authorMichal Wajdeczko <michal.wajdeczko@intel.com>
Mon, 18 Dec 2023 16:53:37 +0000 (17:53 +0100)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 21:31:29 +0000 (16:31 -0500)
The new memory based interrupt processing uses additional entries
in the context.  Add required definitions.

Bspec: 45585, 60184
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20231214185955.1791-4-michal.wajdeczko@intel.com
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
drivers/gpu/drm/xe/regs/xe_lrc_layout.h

index 4be81abc86ad9dec0ec11a7f06c7a428b6aac643..1825d8f79db64e72318d4d8449b3e2beac8977cc 100644 (file)
 #define CTX_PDP0_UDW                   (0x30 + 1)
 #define CTX_PDP0_LDW                   (0x32 + 1)
 
+#define CTX_LRM_INT_MASK_ENABLE                0x50
+#define CTX_INT_MASK_ENABLE_REG                (CTX_LRM_INT_MASK_ENABLE + 1)
+#define CTX_INT_MASK_ENABLE_PTR                (CTX_LRM_INT_MASK_ENABLE + 2)
+#define CTX_LRI_INT_REPORT_PTR         0x55
+#define CTX_INT_STATUS_REPORT_REG      (CTX_LRI_INT_REPORT_PTR + 1)
+#define CTX_INT_STATUS_REPORT_PTR      (CTX_LRI_INT_REPORT_PTR + 2)
+#define CTX_INT_SRC_REPORT_REG         (CTX_LRI_INT_REPORT_PTR + 3)
+#define CTX_INT_SRC_REPORT_PTR         (CTX_LRI_INT_REPORT_PTR + 4)
+
 #endif