--- /dev/null
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/ep93xx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logick EP93xx device tree bindings
+
+maintainers:
+ - Hartley Sweeten <hsweeten@visionengravers.com>
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+
+description: |+
+ The EP93xx SoC is a ARMv4T-based with 200 MHz ARM9 CPU.
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ const: cirrus,ep93xx
+
+ soc:
+ type: object
+ properties:
+ compatible:
+ const: syscon
+
+ syscon:
+ type: object
+ properties:
+ compatible:
+ items:
+ - const: cirrus,ep93xx-syscon
+ - const: syscon
+ - const: simple-mfd
+ required:
+ - compatible
+ - reg
+ - '#clock-cells'
+
+ timer:
+ type: object
+
+ required:
+ - compatible
+ - syscon
+ - timer
+
+required:
+ - compatible
+ - soc
+
+additionalProperties: true
+
+examples:
+ - |
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+
+ syscon: syscon@80930000 {
+ compatible = "cirrus,ep93xx-syscon",
+ "syscon", "simple-mfd";
+ reg = <0x80930000 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+
+ ep93xx-reboot {
+ compatible = "cirrus,ep93xx-reboot";
+ };
+ };
+
+ timer@80810000 {
+ compatible = "cirrus,ep93xx-timer";
+ reg = <0x80810000 0x100>;
+ interrupt-parent = <&vic1>;
+ interrupts = <19>;
+ };
+ };
+
+...
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H
+#define DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H
+
+#define EP93XX_CLK_XTALI 0
+
+#define EP93XX_CLK_PLL1 1
+#define EP93XX_CLK_FCLK 2
+#define EP93XX_CLK_HCLK 3
+#define EP93XX_CLK_PCLK 4
+#define EP93XX_CLK_PLL2 5
+
+#define EP93XX_CLK_UART 6
+
+#define EP93XX_CLK_UART1 7
+#define EP93XX_CLK_UART2 8
+#define EP93XX_CLK_UART3 9
+
+#define EP93XX_CLK_M2M0 10
+#define EP93XX_CLK_M2M1 11
+
+#define EP93XX_CLK_M2P0 12
+#define EP93XX_CLK_M2P1 13
+#define EP93XX_CLK_M2P2 14
+#define EP93XX_CLK_M2P3 15
+#define EP93XX_CLK_M2P4 16
+#define EP93XX_CLK_M2P5 17
+#define EP93XX_CLK_M2P6 18
+#define EP93XX_CLK_M2P7 19
+#define EP93XX_CLK_M2P8 20
+#define EP93XX_CLK_M2P9 21
+
+#define EP93XX_CLK_SPI 22
+
+#define EP93XX_CLK_USB 23
+
+#define EP93XX_CLK_ADC 24
+#define EP93XX_CLK_ADC_EN 25
+
+#define EP93XX_CLK_KEYPAD 26
+
+#define EP93XX_CLK_PWM 27
+
+#define EP93XX_CLK_VIDEO 28
+
+#define EP93XX_CLK_I2S_MCLK 29
+#define EP93XX_CLK_I2S_SCLK 30
+#define EP93XX_CLK_I2S_LRCLK 31
+
+
+#define EP93XX_NUM_CLKS (EP93XX_CLK_I2S_LRCLK + 1)
+
+#endif /* DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H */