tty: serial: uartps: Add support for uartps controller reset

Add support for an optional reset for the uartps controller using
the reset driver. If the uartps node contains the "resets" property,
then cdns_uart_startup performs uartps controller non-pulse out of reset
and reset in exit path.

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Link: https://lore.kernel.org/r/20240425062358.1347684-4-manikanta.guntupalli@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
index de3487206bcb7a4317b5c03825a04fa4a4a1b67b..2acfcea403cef224c798dd844624c58358d920e7 100644 (file)
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -25,6 +25,7 @@
 #include <linux/gpio.h>
 #include <linux/gpio/consumer.h>
 #include <linux/delay.h>
+#include <linux/reset.h>
 
 #define CDNS_UART_TTY_NAME     "ttyPS"
 #define CDNS_UART_NAME         "xuartps"
@@ -198,6 +199,7 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
  * @gpiod_rts:         Pointer to the gpio descriptor
  * @rs485_tx_started:  RS485 tx state
  * @tx_timer:          Timer for tx
+ * @rstc:              Pointer to the reset control
  */
 struct cdns_uart {
        struct uart_port        *port;
@@ -211,6 +213,7 @@ struct cdns_uart {
        struct gpio_desc        *gpiod_rts;
        bool                    rs485_tx_started;
        struct hrtimer          tx_timer;
+       struct reset_control    *rstc;
 };
 struct cdns_platform_data {
        u32 quirks;
@@ -948,6 +951,10 @@ static int cdns_uart_startup(struct uart_port *port)
 
        is_brk_support = cdns_uart->quirks & CDNS_UART_RXBS_SUPPORT;
 
+       ret = reset_control_deassert(cdns_uart->rstc);
+       if (ret)
+               return ret;
+
        uart_port_lock_irqsave(port, &flags);
 
        /* Disable the TX and RX */
@@ -1721,6 +1728,13 @@ static int cdns_uart_probe(struct platform_device *pdev)
                dev_err(&pdev->dev, "clock name 'ref_clk' is deprecated.\n");
        }
 
+       cdns_uart_data->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
+       if (IS_ERR(cdns_uart_data->rstc)) {
+               rc = PTR_ERR(cdns_uart_data->rstc);
+               dev_err_probe(&pdev->dev, rc, "Cannot get UART reset\n");
+               goto err_out_unregister_driver;
+       }
+
        rc = clk_prepare_enable(cdns_uart_data->pclk);
        if (rc) {
                dev_err(&pdev->dev, "Unable to enable pclk clock.\n");
@@ -1881,6 +1895,7 @@ static void cdns_uart_remove(struct platform_device *pdev)
        if (console_port == port)
                console_port = NULL;
 #endif
+       reset_control_assert(cdns_uart_data->rstc);
 
        if (!--instances)
                uart_unregister_driver(cdns_uart_data->cdns_uart_driver);