arm64: dts: renesas: rzg2l-smarc: Enable audio
authorBiju Das <biju.das.jz@bp.renesas.com>
Tue, 21 Sep 2021 08:46:04 +0000 (09:46 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 24 Sep 2021 12:55:24 +0000 (14:55 +0200)
Enable audio on RZ/G2L SMARC EVK by linking SSI0 with WM8978
audio CODEC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210921084605.16250-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi

index 85fd6dbabff247654cd7ac6a5c3163bae10dd5a7..1791c21dfe74327ad1270ac76b41396326c22ec5 100644 (file)
@@ -8,6 +8,19 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
 
+/*
+ * SSI-WM8978
+ *
+ * This command is required when Playback/Capture
+ *
+ *     amixer cset name='Left Input Mixer L2 Switch' on
+ *     amixer cset name='Right Input Mixer R2 Switch' on
+ *     amixer cset name='Headphone Playback Volume' 100
+ *     amixer cset name='PCM Volume' 100%
+ *     amixer cset name='Input PGA Volume' 25
+ *
+ */
+
 / {
        aliases {
                serial0 = &scif0;
                stdout-path = "serial0:115200n8";
        };
 
+       audio_mclock: audio_mclock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <11289600>;
+       };
+
+       snd_rzg2l: sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,format = "i2s";
+               simple-audio-card,bitclock-master = <&cpu_dai>;
+               simple-audio-card,frame-master = <&cpu_dai>;
+               simple-audio-card,mclk-fs = <256>;
+
+               cpu_dai: simple-audio-card,cpu {
+                       sound-dai = <&ssi0>;
+               };
+
+               codec_dai: simple-audio-card,codec {
+                       clocks = <&audio_mclock>;
+                       sound-dai = <&wm8978>;
+               };
+       };
+
        usb0_vbus_otg: regulator-usb0-vbus-otg {
                compatible = "regulator-fixed";
 
        };
 };
 
+&audio_clk1{
+       clock-frequency = <11289600>;
+};
+
+&audio_clk2{
+       clock-frequency = <12288000>;
+};
+
 &ehci0 {
        dr_mode = "otg";
        status = "okay";
 };
 
 &pinctrl {
+       pinctrl-0 = <&sound_clk_pins>;
+       pinctrl-names = "default";
+
        i2c0_pins: i2c0 {
                pins = "RIIC0_SDA", "RIIC0_SCL";
                input-enable;
                         <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
        };
 
+       sound_clk_pins: sound_clk {
+               pins = "AUDIO_CLK1", "AUDIO_CLK2";
+               input-enable;
+       };
+
+       ssi0_pins: ssi0 {
+               pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
+                        <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
+                        <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
+                        <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
+       };
+
        usb0_pins: usb0 {
                pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
                         <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
        status = "okay";
 };
 
+&ssi0 {
+       pinctrl-0 = <&ssi0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
 &usb2_phy0 {
        pinctrl-0 = <&usb0_pins>;
        pinctrl-names = "default";