ARM: dts: aspeed: Add Facebook YAMP BMC
authorTao Ren <taoren@fb.com>
Thu, 9 May 2019 03:55:49 +0000 (20:55 -0700)
committerJoel Stanley <joel@jms.id.au>
Fri, 24 May 2019 04:27:34 +0000 (13:57 +0930)
Add initial version of device tree for Facebook YAMP ast2500 BMC.

Signed-off-by: Tao Ren <taoren@fb.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts [new file with mode: 0644]

index 9b6ae8f95a196660e87b0edeab1359cb096cd6c2..5eaf201add8b88ecf2a494db96a686b34225b449 100644 (file)
@@ -1268,6 +1268,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
        aspeed-bmc-arm-stardragon4800-rep2.dtb \
        aspeed-bmc-facebook-cmm.dtb \
        aspeed-bmc-facebook-tiogapass.dtb \
+       aspeed-bmc-facebook-yamp.dtb \
        aspeed-bmc-intel-s2600wf.dtb \
        aspeed-bmc-opp-lanyang.dtb \
        aspeed-bmc-opp-palmetto.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts
new file mode 100644 (file)
index 0000000..4e09a9c
--- /dev/null
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 Facebook Inc.
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+
+/ {
+       model = "Facebook YAMP 100 BMC";
+       compatible = "facebook,yamp-bmc", "aspeed,ast2500";
+
+       aliases {
+               /*
+                * Override the default uart aliases to avoid breaking
+                * the legacy applications.
+                */
+               serial0 = &uart5;
+               serial1 = &uart1;
+               serial2 = &uart2;
+               serial3 = &uart3;
+       };
+
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";
+       };
+
+       memory@80000000 {
+               reg = <0x80000000 0x20000000>;
+       };
+};
+
+&pinctrl {
+       aspeed,external-nodes = <&gfx &lhc>;
+};
+
+/*
+ * Update reset type to "system" (full chip) to fix warm reboot hang issue
+ * when reset type is set to default ("soc", gated by reset mask registers).
+ */
+&wdt1 {
+       status = "okay";
+       aspeed,reset-type = "system";
+};
+
+/*
+ * wdt2 is not used by Yamp.
+ */
+&wdt2 {
+       status = "disabled";
+};
+
+&fmc {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "bmc";
+#include "facebook-bmc-flash-layout.dtsi"
+       };
+};
+
+&uart1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd1_default
+                    &pinctrl_rxd1_default>;
+};
+
+&uart2 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd2_default
+                    &pinctrl_rxd2_default>;
+};
+
+&uart3 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd3_default
+                    &pinctrl_rxd3_default>;
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&mac0 {
+       status = "okay";
+       use-ncsi;
+       no-hw-checksum;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rmii1_default>;
+};
+
+&i2c0 {
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+};
+
+&i2c2 {
+       status = "okay";
+
+       i2c-switch@75 {
+               compatible = "nxp,pca9548";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x75>;
+       };
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+&i2c4 {
+       status = "okay";
+};
+
+&i2c5 {
+       status = "okay";
+};
+
+&i2c6 {
+       status = "okay";
+};
+
+&i2c7 {
+       status = "okay";
+};
+
+&i2c8 {
+       status = "okay";
+};
+
+&i2c9 {
+       status = "okay";
+};
+
+&i2c10 {
+       status = "okay";
+};
+
+&i2c11 {
+       status = "okay";
+};
+
+&i2c12 {
+       status = "okay";
+};
+
+&i2c13 {
+       status = "okay";
+};
+
+&vhub {
+       status = "okay";
+};