arm64: dts: qcom: sm8350: Fix DSI PLL size
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Fri, 20 Jan 2023 21:00:58 +0000 (22:00 +0100)
committerBjorn Andersson <andersson@kernel.org>
Thu, 26 Jan 2023 20:52:29 +0000 (14:52 -0600)
As downstream indicates, DSI PLL is actually 0x27c and not 0x260-
wide. Fix that to reserve the correct registers.

Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120210101.2146852-6-konrad.dybcio@linaro.org
arch/arm64/boot/dts/qcom/sm8350.dtsi

index ae5c16cfc0e516bc067e7cd71697b39b1a8445e0..f5a008bb46572f8293ec6606618622562b66c09e 100644 (file)
                                compatible = "qcom,sm8350-dsi-phy-5nm";
                                reg = <0 0x0ae94400 0 0x200>,
                                      <0 0x0ae94600 0 0x280>,
-                                     <0 0x0ae94900 0 0x260>;
+                                     <0 0x0ae94900 0 0x27c>;
                                reg-names = "dsi_phy",
                                            "dsi_phy_lane",
                                            "dsi_pll";
                                compatible = "qcom,sm8350-dsi-phy-5nm";
                                reg = <0 0x0ae96400 0 0x200>,
                                      <0 0x0ae96600 0 0x280>,
-                                     <0 0x0ae96900 0 0x260>;
+                                     <0 0x0ae96900 0 0x27c>;
                                reg-names = "dsi_phy",
                                            "dsi_phy_lane",
                                            "dsi_pll";