ARM: dts: aspeed: Add reg hints to syscon children
authorAndrew Jeffery <andrew@aj.id.au>
Tue, 3 Dec 2019 12:04:12 +0000 (22:34 +1030)
committerJoel Stanley <joel@jms.id.au>
Tue, 17 Dec 2019 02:38:20 +0000 (13:38 +1100)
Fixes the following warnings:

    arch/arm/boot/dts/aspeed-g5.dtsi:209.28-226.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/syscon@1e6e2000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    arch/arm/boot/dts/aspeed-g4.dtsi:156.28-172.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/syscon@1e6e2000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/aspeed-g4.dtsi
arch/arm/boot/dts/aspeed-g5.dtsi

index e1d4af06c2179587e5d38eec2eb17add6e34b842..807a0fc2067007a89e7b1c680b9805d732917eee 100644 (file)
                                compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
                                reg = <0x1e6e2000 0x1a8>;
                                #address-cells = <1>;
-                               #size-cells = <0>;
+                               #size-cells = <1>;
+                               ranges = <0 0x1e6e2000 0x1000>;
                                #clock-cells = <1>;
                                #reset-cells = <1>;
 
-                               pinctrl: pinctrl {
-                                       compatible = "aspeed,ast2400-pinctrl";
-                               };
-
-                               p2a: p2a-control {
+                               p2a: p2a-control@2c {
+                                       reg = <0x2c 0x4>;
                                        compatible = "aspeed,ast2400-p2a-ctrl";
                                        status = "disabled";
                                };
+
+                               pinctrl: pinctrl@80 {
+                                       reg = <0x80 0x18>, <0xa0 0x10>;
+                                       compatible = "aspeed,ast2400-pinctrl";
+                               };
                        };
 
                        rng: hwrng@1e6e2078 {
index 5f0ed8d77d9c8c5cf60c125285fe51522b145809..65c005c54dad520255fdcc5e3a1a7ea8ed710868 100644 (file)
                                compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
                                reg = <0x1e6e2000 0x1a8>;
                                #address-cells = <1>;
-                               #size-cells = <0>;
+                               #size-cells = <1>;
+                               ranges = <0 0x1e6e2000 0x1000>;
                                #clock-cells = <1>;
                                #reset-cells = <1>;
 
-                               pinctrl: pinctrl {
-                                       compatible = "aspeed,ast2500-pinctrl";
-                                       aspeed,external-nodes = <&gfx &lhc>;
-
-                               };
-
-                               p2a: p2a-control {
+                               p2a: p2a-control@2c {
                                        compatible = "aspeed,ast2500-p2a-ctrl";
+                                       reg = <0x2c 0x4>;
                                        status = "disabled";
                                };
+
+                               pinctrl: pinctrl@80 {
+                                       compatible = "aspeed,ast2500-pinctrl";
+                                       reg = <0x80 0x18>, <0xa0 0x10>;
+                                       aspeed,external-nodes = <&gfx>, <&lhc>;
+                               };
                        };
 
                        rng: hwrng@1e6e2078 {