int i;
        LIST_HEAD(tmp_list);
 
-       /*
-        * In-use bit automatically set by reading chanctrl
-        * If 0, we got it, if 1, someone else did
-        */
-       chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
-       if (chanctrl & IOAT_CHANCTRL_CHANNEL_IN_USE)
-               return -EBUSY;
+       /* have we already been set up? */
+       if (!list_empty(&ioat_chan->free_desc))
+               return INITIAL_IOAT_DESC_COUNT;
 
         /* Setup register to interrupt and write completion status on error */
-       chanctrl = IOAT_CHANCTRL_CHANNEL_IN_USE |
-               IOAT_CHANCTRL_ERR_INT_EN |
+       chanctrl = IOAT_CHANCTRL_ERR_INT_EN |
                IOAT_CHANCTRL_ANY_ERR_ABORT_EN |
                IOAT_CHANCTRL_ERR_COMPLETION_EN;
         writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
                        in_use_descs - 1);
 
        ioat_chan->last_completion = ioat_chan->completion_addr = 0;
-
-       /* Tell hw the chan is free */
-       chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
-       chanctrl &= ~IOAT_CHANCTRL_CHANNEL_IN_USE;
-       writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
 }
 
 static struct dma_async_tx_descriptor *