RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config()
authorAnup Patel <apatel@ventanamicro.com>
Wed, 7 Dec 2022 03:46:51 +0000 (09:16 +0530)
committerAnup Patel <anup@brainfault.org>
Wed, 7 Dec 2022 03:46:51 +0000 (09:16 +0530)
The reg_val check in kvm_riscv_vcpu_set_reg_config() should only
be done for isa config register.

Fixes: 9bfd900beeec ("RISC-V: KVM: Improve ISA extension by using a bitmap")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/kvm/vcpu.c

index 17d5b3f8c2eecbfbab0049f793add08760b1d3a2..982a3f5e7130c4c87a36087cceb4f4b397a87ed6 100644 (file)
@@ -296,12 +296,15 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
        if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))
                return -EFAULT;
 
-       /* This ONE REG interface is only defined for single letter extensions */
-       if (fls(reg_val) >= RISCV_ISA_EXT_BASE)
-               return -EINVAL;
-
        switch (reg_num) {
        case KVM_REG_RISCV_CONFIG_REG(isa):
+               /*
+                * This ONE REG interface is only defined for
+                * single letter extensions.
+                */
+               if (fls(reg_val) >= RISCV_ISA_EXT_BASE)
+                       return -EINVAL;
+
                if (!vcpu->arch.ran_atleast_once) {
                        /* Ignore the enable/disable request for certain extensions */
                        for (i = 0; i < RISCV_ISA_EXT_BASE; i++) {