arm64: dts: qcom: ipq8074: Fix the PCI I/O port range
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tue, 28 Feb 2023 16:47:41 +0000 (22:17 +0530)
committerBjorn Andersson <andersson@kernel.org>
Thu, 16 Mar 2023 00:24:34 +0000 (17:24 -0700)
For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI addresses
(0x10200000, 0x20200000) specified in the ranges property for I/O region.

While at it, let's use the missing 0x prefix for the addresses and align
them in a single line.

Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-6-manivannan.sadhasivam@linaro.org
arch/arm64/boot/dts/qcom/ipq8074.dtsi

index f769e63c955c76a15d608e6f104908c1fa5a9687..fe37dcdc52c8335fc2fcf920ee83369be74b2d87 100644 (file)
                        phys = <&pcie_phy1>;
                        phy-names = "pciephy";
 
-                       ranges = <0x81000000 0 0x10200000 0x10200000
-                                 0 0x10000>,   /* downstream I/O */
-                                <0x82000000 0 0x10220000 0x10220000
-                                 0 0xfde0000>; /* non-prefetchable memory */
+                       ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>,   /* I/O */
+                                <0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
 
                        interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "msi";
                        phys = <&pcie_phy0>;
                        phy-names = "pciephy";
 
-                       ranges = <0x81000000 0 0x20200000 0x20200000
-                                 0 0x10000>, /* downstream I/O */
-                                <0x82000000 0 0x20220000 0x20220000
-                                 0 0xfde0000>; /* non-prefetchable memory */
+                       ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>,   /* I/O */
+                                <0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
 
                        interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "msi";