arm64: dts: mt8192: Add PCIe node

Add PCIe node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220330133816.30806-2-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index c6439a010e061766c7a845209161d93ae7c2be57..0d32df382f1075a2781e4f583b513d1a9b894660 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -716,6 +716,41 @@
                        status = "disabled";
                };
 
+               pcie: pcie@11230000 {
+                       compatible = "mediatek,mt8192-pcie";
+                       device_type = "pci";
+                       reg = <0 0x11230000 0 0x2000>;
+                       reg-names = "pcie-mac";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       clocks = <&infracfg CLK_INFRA_PCIE_PL_P_250M>,
+                                <&infracfg CLK_INFRA_PCIE_TL_26M>,
+                                <&infracfg CLK_INFRA_PCIE_TL_96M>,
+                                <&infracfg CLK_INFRA_PCIE_TL_32K>,
+                                <&infracfg CLK_INFRA_PCIE_PERI_26M>,
+                                <&infracfg CLK_INFRA_PCIE_TOP_H_133M>;
+                       clock-names = "pl_250m", "tl_26m", "tl_96m",
+                                     "tl_32k", "peri_26m", "top_133m";
+                       assigned-clocks = <&topckgen CLK_TOP_TL_SEL>;
+                       assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D6_D4>;
+                       interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH 0>;
+                       bus-range = <0x00 0xff>;
+                       ranges = <0x82000000 0 0x12000000 0x0 0x12000000 0 0x0800000>,
+                                <0x81000000 0 0x12800000 0x0 0x12800000 0 0x0800000>;
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 7>;
+                       interrupt-map = <0 0 0 1 &pcie_intc0 0>,
+                                       <0 0 0 2 &pcie_intc0 1>,
+                                       <0 0 0 3 &pcie_intc0 2>,
+                                       <0 0 0 4 &pcie_intc0 3>;
+
+                       pcie_intc0: interrupt-controller {
+                               interrupt-controller;
+                               #address-cells = <0>;
+                               #interrupt-cells = <1>;
+                       };
+               };
+
                nor_flash: spi@11234000 {
                        compatible = "mediatek,mt8192-nor";
                        reg = <0 0x11234000 0 0xe0>;