scsi: qla2xxx: edif: Increase ELS payload
authorQuinn Tran <qutran@marvell.com>
Tue, 26 Oct 2021 11:54:09 +0000 (04:54 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 18 Nov 2021 18:17:04 +0000 (19:17 +0100)
[ Upstream commit 0f6d600a26e89d31d8381b324fc970f72579a126 ]

Currently, firmware limits ELS payload to FC frame size/2112.  This patch
adjusts memory buffer size to be able to handle max ELS payload.

Link: https://lore.kernel.org/r/20211026115412.27691-11-njavali@marvell.com
Fixes: 84318a9f01ce ("scsi: qla2xxx: edif: Add send, receive, and accept for auth_els")
Reviewed-by: Himanshu Madhani <himanshu.madhani@oracle.com>
Signed-off-by: Quinn Tran <qutran@marvell.com>
Signed-off-by: Nilesh Javali <njavali@marvell.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/scsi/qla2xxx/qla_edif.c
drivers/scsi/qla2xxx/qla_edif.h
drivers/scsi/qla2xxx/qla_edif_bsg.h
drivers/scsi/qla2xxx/qla_init.c
drivers/scsi/qla2xxx/qla_os.c

index 3931bae3222b36aa0cfc346c0141cf696d9f7b31..98235df803aef8d17c7c5294f35dacc4c71c1f40 100644 (file)
@@ -2384,7 +2384,7 @@ void qla24xx_auth_els(scsi_qla_host_t *vha, void **pkt, struct rsp_que **rsp)
                return;
        }
 
-       if (totlen > MAX_PAYLOAD) {
+       if (totlen > ELS_MAX_PAYLOAD) {
                ql_dbg(ql_dbg_edif, vha, 0x0910d,
                    "%s WARNING: verbose ELS frame received (totlen=%x)\n",
                    __func__, totlen);
index 9e8f28d0caa1bca1a58a7cdcf6b83ec9d2869a53..45cf87e337780724e73009fe7486f747d9ccc297 100644 (file)
@@ -93,7 +93,6 @@ struct sa_update_28xx {
 };
 
 #define        NUM_ENTRIES     256
-#define        MAX_PAYLOAD     1024
 #define        PUR_GET         1
 
 struct dinfo {
@@ -128,6 +127,8 @@ struct enode {
        } u;
 };
 
+#define RX_ELS_SIZE (roundup(sizeof(struct enode) + ELS_MAX_PAYLOAD, SMP_CACHE_BYTES))
+
 #define EDIF_SESSION_DOWN(_s) \
        (qla_ini_mode_enabled(_s->vha) && (_s->disc_state == DSC_DELETE_PEND || \
         _s->disc_state == DSC_DELETED || \
index 58b718d35d19a9133d4d7113a32e653a3e5b4558..53026d82ebffe3bbdb0a4abfa988f9412fcd493e 100644 (file)
@@ -8,7 +8,7 @@
 #define __QLA_EDIF_BSG_H
 
 /* BSG Vendor specific commands */
-#define        ELS_MAX_PAYLOAD         1024
+#define        ELS_MAX_PAYLOAD         2112
 #ifndef        WWN_SIZE
 #define WWN_SIZE               8
 #endif
index 6da4419bcec16b2f9ad3f0eef762d209f936886b..847a6e5d9cb076e8dcdcc207b51ad03a141296ff 100644 (file)
@@ -4467,6 +4467,10 @@ qla2x00_init_rings(scsi_qla_host_t *vha)
                    (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
        }
 
+       /* ELS pass through payload is limit by frame size. */
+       if (ha->flags.edif_enabled)
+               mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD);
+
        rval = qla2x00_init_firmware(vha, ha->init_cb_size);
 next_check:
        if (rval) {
index b5346d9066dc6f57517b82ab41f1a2d8da1c4f9e..8d87cfae9c59847053a2bc01d314cc8e7e2bf095 100644 (file)
@@ -4337,7 +4337,7 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
 
        /* allocate the purex dma pool */
        ha->purex_dma_pool = dma_pool_create(name, &ha->pdev->dev,
-           MAX_PAYLOAD, 8, 0);
+           ELS_MAX_PAYLOAD, 8, 0);
 
        if (!ha->purex_dma_pool) {
                ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,