drm/i915/mtl: Add gmbus and gpio support
authorRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Fri, 2 Sep 2022 06:03:36 +0000 (23:03 -0700)
committerRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Mon, 12 Sep 2022 21:53:33 +0000 (14:53 -0700)
Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
From spec we have registers GPIO_CTL[1-5] mapped to native display phys and
GPIO_CTL[9-12] are mapped to TC ports.

v2:
 - Drop unused GPIO pins(MattR)

BSpec: 49306

Cc: Matt Roper <matthew.d.roper@intel.com>
Original Author: Brian J Lovin
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-6-radhakrishna.sripada@intel.com
drivers/gpu/drm/i915/display/intel_gmbus.c
drivers/gpu/drm/i915/display/intel_gmbus.h

index 6f6cfccad4770e07d0e84146154a70148f100ff2..74443f57f62dfe3530dc17df6437dc2e9f4159b5 100644 (file)
@@ -117,6 +117,18 @@ static const struct gmbus_pin gmbus_pins_dg2[] = {
        [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOJ },
 };
 
+static const struct gmbus_pin gmbus_pins_mtp[] = {
+       [GMBUS_PIN_1_BXT] = { "dpa", GPIOB },
+       [GMBUS_PIN_2_BXT] = { "dpb", GPIOC },
+       [GMBUS_PIN_3_BXT] = { "dpc", GPIOD },
+       [GMBUS_PIN_4_CNP] = { "dpd", GPIOE },
+       [GMBUS_PIN_5_MTP] = { "dpe", GPIOF },
+       [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOJ },
+       [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIOK },
+       [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIOL },
+       [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIOM },
+};
+
 static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *i915,
                                             unsigned int pin)
 {
@@ -129,6 +141,9 @@ static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *i915,
        } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
                pins = gmbus_pins_dg1;
                size = ARRAY_SIZE(gmbus_pins_dg1);
+       } else if (INTEL_PCH_TYPE(i915) >= PCH_MTP) {
+               pins = gmbus_pins_mtp;
+               size = ARRAY_SIZE(gmbus_pins_mtp);
        } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
                pins = gmbus_pins_icp;
                size = ARRAY_SIZE(gmbus_pins_icp);
index 8edc2e99cf5379f67d39c21acd45af2f0983868d..20f704bd4e7004fab13e6aa097f4a09a99355e93 100644 (file)
@@ -24,6 +24,7 @@ struct i2c_adapter;
 #define GMBUS_PIN_2_BXT                2
 #define GMBUS_PIN_3_BXT                3
 #define GMBUS_PIN_4_CNP                4
+#define GMBUS_PIN_5_MTP                5
 #define GMBUS_PIN_9_TC1_ICP    9
 #define GMBUS_PIN_10_TC2_ICP   10
 #define GMBUS_PIN_11_TC3_ICP   11