net: hns3: add support for imp-handle ras capability

IMP(Intelligent Management Processor) firmware add a new feature to
handle and consolidate RAS information for new devices, NIC driver
only needs to query the reported RAS information. NIC driver adds
support for this feature.

Driver queries device capability to check whether IMP support this
feature, If yes, execute the new RAS processing branch.

In order to add a method to check whether PF supports imp-handle RAS
feature, add dumping this info in debugfs.

Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index dc9b5bc3431bf5f885ea328183c8458687287f62..e564aa32a4142212f6fc49cdd5fd4d502ef91865 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -91,6 +91,7 @@ enum HNAE3_DEV_CAP_BITS {
        HNAE3_DEV_SUPPORT_STASH_B,
        HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
        HNAE3_DEV_SUPPORT_PAUSE_B,
+       HNAE3_DEV_SUPPORT_RAS_IMP_B,
        HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
        HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,
        HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,
@@ -129,6 +130,9 @@ enum HNAE3_DEV_CAP_BITS {
 #define hnae3_dev_phy_imp_supported(hdev) \
        test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps)
 
+#define hnae3_dev_ras_imp_supported(hdev) \
+       test_bit(HNAE3_DEV_SUPPORT_RAS_IMP_B, (hdev)->ae_dev->caps)
+
 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \
        test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps)
 

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index cf1efd2f4a0fc4d8a23c04bce2c5713e641ad7b4..a0edca848392331b6bff78980466233ba892dbe4 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -349,6 +349,9 @@ static struct hns3_dbg_cap_info hns3_dbg_cap[] = {
        }, {
                .name = "support imp-controlled PHY",
                .cap_bit = HNAE3_DEV_SUPPORT_PHY_IMP_B,
+       }, {
+               .name = "support imp-controlled RAS",
+               .cap_bit = HNAE3_DEV_SUPPORT_RAS_IMP_B,
        }, {
                .name = "support rxd advanced layout",
                .cap_bit = HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
index 614763f5e877cbf1729f7097fa48b7f968da3edf..887297e37cf3399f35e10876cadc5fbfdae2101d 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
@@ -387,6 +387,8 @@ static void hclge_parse_capability(struct hclge_dev *hdev,
                set_bit(HNAE3_DEV_SUPPORT_PAUSE_B, ae_dev->caps);
        if (hnae3_get_bit(caps, HCLGE_CAP_PHY_IMP_B))
                set_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, ae_dev->caps);
+       if (hnae3_get_bit(caps, HCLGE_CAP_RAS_IMP_B))
+               set_bit(HNAE3_DEV_SUPPORT_RAS_IMP_B, ae_dev->caps);
        if (hnae3_get_bit(caps, HCLGE_CAP_RXD_ADV_LAYOUT_B))
                set_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, ae_dev->caps);
        if (hnae3_get_bit(caps, HCLGE_CAP_PORT_VLAN_BYPASS_B)) {

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 234f0a3beec11467525e38b9c56a7681a4cfbe16..221811af9473986ad146c9f1864d30da2412668e 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -392,6 +392,7 @@ enum HCLGE_CAP_BITS {
        HCLGE_CAP_HW_PAD_B,
        HCLGE_CAP_STASH_B,
        HCLGE_CAP_UDP_TUNNEL_CSUM_B,
+       HCLGE_CAP_RAS_IMP_B = 12,
        HCLGE_CAP_FEC_B = 13,
        HCLGE_CAP_PAUSE_B = 14,
        HCLGE_CAP_RXD_ADV_LAYOUT_B = 15,

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 3c08fc71b951641d6e546bde3615bc42e05c8343..cf34216df1711eca1fc31904eb26acf6949f8ac0 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -4299,7 +4299,7 @@ static void hclge_errhand_service_task(struct hclge_dev *hdev)
        if (!test_and_clear_bit(HCLGE_STATE_ERR_SERVICE_SCHED, &hdev->state))
                return;
 
-       if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3)
+       if (hnae3_dev_ras_imp_supported(hdev))
                hclge_handle_err_recovery(hdev);
        else
                hclge_misc_err_recovery(hdev);