arm64/sme: Standardise bitfield names for SVCR
authorMark Brown <broonie@kernel.org>
Tue, 10 May 2022 16:12:00 +0000 (17:12 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Mon, 16 May 2022 18:50:20 +0000 (19:50 +0100)
The bitfield definitions for SVCR have a SYS_ added to the names of the
constant which will be a problem for automatic generation. Remove the
prefixes, no functional change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220510161208.631259-5-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/fpsimd.h
arch/arm64/include/asm/processor.h
arch/arm64/include/asm/sysreg.h
arch/arm64/kernel/fpsimd.c

index 75caa2098d5b4c45c4d42a1a194b68c3b81db466..aa11dbec0d70fb1d28c5b578899871d3dba77407 100644 (file)
@@ -67,12 +67,12 @@ extern void fpsimd_save_and_flush_cpu_state(void);
 
 static inline bool thread_sm_enabled(struct thread_struct *thread)
 {
-       return system_supports_sme() && (thread->svcr & SYS_SVCR_EL0_SM_MASK);
+       return system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK);
 }
 
 static inline bool thread_za_enabled(struct thread_struct *thread)
 {
-       return system_supports_sme() && (thread->svcr & SYS_SVCR_EL0_ZA_MASK);
+       return system_supports_sme() && (thread->svcr & SVCR_EL0_ZA_MASK);
 }
 
 /* Maximum VL that SVE/SME VL-agnostic software can transparently support */
index 1d2ca4870b848042770707e6814f2f606f215fa0..69ce163d2fb28f1137c807039fb3fe61740bde2a 100644 (file)
@@ -192,7 +192,7 @@ static inline unsigned int thread_get_sme_vl(struct thread_struct *thread)
 
 static inline unsigned int thread_get_cur_vl(struct thread_struct *thread)
 {
-       if (system_supports_sme() && (thread->svcr & SYS_SVCR_EL0_SM_MASK))
+       if (system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK))
                return thread_get_sme_vl(thread);
        else
                return thread_get_sve_vl(thread);
index ab2d7cbc63fcbc0907e19a9a0d246d9838291c66..4459cd4a37f5f30bee8cbb8f23737bece518886a 100644 (file)
 #define SYS_RNDRRS_EL0                 sys_reg(3, 3, 2, 4, 1)
 
 #define SYS_SVCR_EL0                   sys_reg(3, 3, 4, 2, 2)
-#define SYS_SVCR_EL0_ZA_MASK           2
-#define SYS_SVCR_EL0_SM_MASK           1
+#define SVCR_EL0_ZA_MASK               2
+#define SVCR_EL0_SM_MASK               1
 
 #define SYS_PMCR_EL0                   sys_reg(3, 3, 9, 12, 0)
 #define SYS_PMCNTENSET_EL0             sys_reg(3, 3, 9, 12, 1)
index a568735b7c2e4b8f58dc5fb53e782c50f2fb327a..a5f6d6d9f372e80c0ec7fb2eafaef03b04e29a20 100644 (file)
@@ -1918,7 +1918,7 @@ void __efi_fpsimd_begin(void)
                                svcr = read_sysreg_s(SYS_SVCR_EL0);
 
                                if (!system_supports_fa64())
-                                       ffr = svcr & SYS_SVCR_EL0_SM_MASK;
+                                       ffr = svcr & SVCR_EL0_SM_MASK;
 
                                __this_cpu_write(efi_sm_state, ffr);
                        }
@@ -1929,7 +1929,7 @@ void __efi_fpsimd_begin(void)
 
                        if (system_supports_sme())
                                sysreg_clear_set_s(SYS_SVCR_EL0,
-                                                  SYS_SVCR_EL0_SM_MASK, 0);
+                                                  SVCR_EL0_SM_MASK, 0);
 
                } else {
                        fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state));
@@ -1964,7 +1964,7 @@ void __efi_fpsimd_end(void)
                                if (__this_cpu_read(efi_sm_state)) {
                                        sysreg_clear_set_s(SYS_SVCR_EL0,
                                                           0,
-                                                          SYS_SVCR_EL0_SM_MASK);
+                                                          SVCR_EL0_SM_MASK);
                                        if (!system_supports_fa64())
                                                ffr = efi_sm_state;
                                }