Registers that can be fetched from the info ioctl.
Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
        return err;
 }
 
+/**
+ * cayman_get_allowed_info_register - fetch the register for the info ioctl
+ *
+ * @rdev: radeon_device pointer
+ * @reg: register offset in bytes
+ * @val: register value
+ *
+ * Returns 0 for success or -EINVAL for an invalid register
+ *
+ */
+int cayman_get_allowed_info_register(struct radeon_device *rdev,
+                                    u32 reg, u32 *val)
+{
+       switch (reg) {
+       case GRBM_STATUS:
+       case GRBM_STATUS_SE0:
+       case GRBM_STATUS_SE1:
+       case SRBM_STATUS:
+       case SRBM_STATUS2:
+       case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):
+       case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):
+       case UVD_STATUS:
+               *val = RREG32(reg);
+               return 0;
+       default:
+               return -EINVAL;
+       }
+}
+
 int tn_get_temp(struct radeon_device *rdev)
 {
        u32 temp = RREG32_SMC(TN_CURRENT_GNB_TEMP) & 0x7ff;
 
 #define UVD_UDEC_DBW_ADDR_CONFIG                       0xEF54
 #define UVD_RBC_RB_RPTR                                        0xF690
 #define UVD_RBC_RB_WPTR                                        0xF694
+#define UVD_STATUS                                     0xf6bc
 
 /*
  * PM4
 
        .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
        .get_xclk = &rv770_get_xclk,
        .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+       .get_allowed_info_register = cayman_get_allowed_info_register,
        .gart = {
                .tlb_flush = &cayman_pcie_gart_tlb_flush,
                .get_page_entry = &rs600_gart_get_page_entry,
        .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
        .get_xclk = &r600_get_xclk,
        .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
+       .get_allowed_info_register = cayman_get_allowed_info_register,
        .gart = {
                .tlb_flush = &cayman_pcie_gart_tlb_flush,
                .get_page_entry = &rs600_gart_get_page_entry,
 
                             struct radeon_ring *ring);
 void cayman_dma_set_wptr(struct radeon_device *rdev,
                         struct radeon_ring *ring);
+int cayman_get_allowed_info_register(struct radeon_device *rdev,
+                                    u32 reg, u32 *val);
 
 int ni_dpm_init(struct radeon_device *rdev);
 void ni_dpm_setup_asic(struct radeon_device *rdev);