drm/amd/display: Pass debug watermarks through to DCN35 DML2

[Why]
The DC debug options currently do not function for dynamically adjusting
our watermarks.

[How]
Hook them up before passing them to DML2.
Also make sure we're using dc->bb_overrides since dc->debug isn't
populated during dc_construct.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Michael Strauss <michael.strauss@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
index 39cf1ae3a3e16238f59e16db69556a6156cef067..e9d88f52717b4419f5633974c4d1fc4f38772a00 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
@@ -326,6 +326,25 @@ void dcn35_update_bw_bounding_box_fpu(struct dc *dc,
                dcn3_5_soc.dram_clock_change_latency_us =
                        dc->debug.dram_clock_change_latency_ns / 1000.0;
        }
+
+       if (dc->bb_overrides.dram_clock_change_latency_ns > 0)
+               dcn3_5_soc.dram_clock_change_latency_us =
+                       dc->bb_overrides.dram_clock_change_latency_ns / 1000.0;
+
+       if (dc->bb_overrides.sr_exit_time_ns > 0)
+               dcn3_5_soc.sr_exit_time_us = dc->bb_overrides.sr_exit_time_ns / 1000.0;
+
+       if (dc->bb_overrides.sr_enter_plus_exit_time_ns > 0)
+               dcn3_5_soc.sr_enter_plus_exit_time_us =
+                       dc->bb_overrides.sr_enter_plus_exit_time_ns / 1000.0;
+
+       if (dc->bb_overrides.sr_exit_z8_time_ns > 0)
+               dcn3_5_soc.sr_exit_z8_time_us = dc->bb_overrides.sr_exit_z8_time_ns / 1000.0;
+
+       if (dc->bb_overrides.sr_enter_plus_exit_z8_time_ns > 0)
+               dcn3_5_soc.sr_enter_plus_exit_z8_time_us =
+                       dc->bb_overrides.sr_enter_plus_exit_z8_time_ns / 1000.0;
+
        /*temp till dml2 fully work without dml1*/
        dml_init_instance(&dc->dml, &dcn3_5_soc, &dcn3_5_ip,
                                DML_PROJECT_DCN31);