arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Wed, 8 Jul 2020 08:56:18 +0000 (17:56 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Fri, 10 Jul 2020 01:33:28 +0000 (10:33 +0900)
This adds missing clock-names and reset-names to pcie-phy node according to
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi

index f4a56b208837160911faf159aa871236bf7d4b37..a87b8a678719635f86946ddf0dff9671bdc8f11c 100644 (file)
                        compatible = "socionext,uniphier-ld20-pcie-phy";
                        reg = <0x66038000 0x4000>;
                        #phy-cells = <0>;
+                       clock-names = "link";
                        clocks = <&sys_clk 24>;
+                       reset-names = "link";
                        resets = <&sys_rst 24>;
                        socionext,syscon = <&soc_glue>;
                };
index 72f16881cf53f56c7cc322e47c86aa7d4bfb6310..0e52dadf54b3a7de3c030da4097b17b9d755290b 100644 (file)
                        compatible = "socionext,uniphier-pxs3-pcie-phy";
                        reg = <0x66038000 0x4000>;
                        #phy-cells = <0>;
+                       clock-names = "link";
                        clocks = <&sys_clk 24>;
+                       reset-names = "link";
                        resets = <&sys_rst 24>;
                        socionext,syscon = <&soc_glue>;
                };