snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
                RT5651_PWR_JD_M, RT5651_PWR_JD_M);
 
+       /* Set OVCD threshold current and scale-factor */
+       snd_soc_component_write(component, RT5651_PR_BASE + RT5651_BIAS_CUR4,
+                               0xa800 | rt5651->ovcd_sf);
+
        snd_soc_component_update_bits(component, RT5651_MICBIAS,
                                      RT5651_MIC1_OVCD_MASK |
                                      RT5651_MIC1_OVTH_MASK |
                                     "realtek,jack-detect-source", &val) == 0)
                rt5651->jd_src = val;
 
+       /*
+        * Testing on various boards has shown that good defaults for the OVCD
+        * threshold and scale-factor are 2000µA and 0.75. For an effective
+        * limit of 1500µA, this seems to be more reliable then 1500µA and 1.0.
+        */
        rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA;
+       rt5651->ovcd_sf = RT5651_MIC_OVCD_SF_0P75;
 
        if (device_property_read_u32(component->dev,
                        "realtek,over-current-threshold-microamp", &val) == 0) {
                                 val);
                }
        }
+
+       if (device_property_read_u32(component->dev,
+                       "realtek,over-current-scale-factor", &val) == 0) {
+               if (val <= RT5651_OVCD_SF_1P5)
+                       rt5651->ovcd_sf = val << RT5651_MIC_OVCD_SF_SFT;
+               else
+                       dev_warn(component->dev, "Warning: Invalid over-current-scale-factor value: %d, defaulting to 0.75\n",
+                                val);
+       }
 }
 
 static int rt5651_probe(struct snd_soc_component *component)
 
 /* Index of Codec Private Register definition */
 #define RT5651_BIAS_CUR1                       0x12
 #define RT5651_BIAS_CUR3                       0x14
+#define RT5651_BIAS_CUR4                       0x15
 #define RT5651_CLSD_INT_REG1                   0x1c
 #define RT5651_CHPUMP_INT_REG1                 0x24
 #define RT5651_MAMP_INT_REG2                   0x37
 #define RT5651_D_GATE_EN_SFT                   0
 
 /* Codec Private Register definition */
+
+/* MIC Over current threshold scale factor (0x15) */
+#define RT5651_MIC_OVCD_SF_MASK                        (0x3 << 8)
+#define RT5651_MIC_OVCD_SF_SFT                 8
+#define RT5651_MIC_OVCD_SF_0P5                 (0x0 << 8)
+#define RT5651_MIC_OVCD_SF_0P75                        (0x1 << 8)
+#define RT5651_MIC_OVCD_SF_1P0                 (0x2 << 8)
+#define RT5651_MIC_OVCD_SF_1P5                 (0x3 << 8)
+
 /* 3D Speaker Control (0x63) */
 #define RT5651_3D_SPK_MASK                     (0x1 << 15)
 #define RT5651_3D_SPK_SFT                      15
        struct delayed_work jack_detect_work;
        enum rt5651_jd_src jd_src;
        unsigned int ovcd_th;
+       unsigned int ovcd_sf;
 
        int irq;
        int sysclk;