drm/amd/display: Rework DC Z10 restore

[Why]
The call currently does two things:
1. Exits DMCUB from idle optimization if it was in
2. Checks DMCUB scratch register to determine if we need to call
   DMCUB to do deferred HW restore and then sends the command if it's
   ready for it.

By doing (1) we prevent driver idle from being renotified in the cases
where driver had previously allowed DC level idle optimizations via
dc_allow_idle_optimizations since it thinks:

allow == dc->idle_optimizations_allowed

...and that the operation is a no-op.

We want driver idle to be resent at the next opprotunity to do so
for video playback cases.

[How]
Migrate all usecases of dc_z10_restore to only perform (2).

Add extra calls to dc_allow_idle_optimizations to handle (1) and also
keep SW state matching with when we requested enter/exit of DMCUB
idle optimizations.

Ensure cursor idle optimizations false always get called when IPS
is supported.

Further rework/redesign is needed to decide whether we need a separate
level of DM allow vs DC allow and when to attempt re-entry.

Reviewed-by: Yihan Zhu <yihan.zhu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index aa7c02ba948e9ce63aa84eb7518f9c73c80d107a..af83ec23f3a07e8de99ef65ca88d97708aea1ae8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1836,8 +1836,8 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c
        struct dc_state *old_state;
        bool subvp_prev_use = false;
 
-       dc_z10_restore(dc);
        dc_allow_idle_optimizations(dc, false);
+       dc_z10_restore(dc);
 
        for (i = 0; i < dc->res_pool->pipe_count; i++) {
                struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i];
@@ -3376,6 +3376,9 @@ static void commit_planes_for_stream_fast(struct dc *dc,
        int i, j;
        struct pipe_ctx *top_pipe_to_program = NULL;
        struct dc_stream_status *stream_status = NULL;
+       if (dc->caps.ips_support)
+               dc_allow_idle_optimizations(dc, false);
+
        dc_z10_restore(dc);
 
        top_pipe_to_program = resource_get_otg_master_for_stream(
@@ -3503,6 +3506,9 @@ static void commit_planes_for_stream(struct dc *dc,
        // dc->current_state anymore, so we have to cache it before we apply
        // the new SubVP context
        subvp_prev_use = false;
+       if (dc->caps.ips_support)
+               dc_allow_idle_optimizations(dc, false);
+
        dc_z10_restore(dc);
        if (update_type == UPDATE_TYPE_FULL)
                wait_for_outstanding_hw_updates(dc, context);
@@ -4686,6 +4692,9 @@ void dc_set_power_state(
        case DC_ACPI_CM_POWER_STATE_D0:
                dc_state_construct(dc, dc->current_state);
 
+               if (dc->caps.ips_support)
+                       dc_allow_idle_optimizations(dc, false);
+
                dc_z10_restore(dc);
 
                dc->hwss.init_hw(dc);

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 54670e0b15189552dd8ee85a5c1a6f905820be37..23f4f3c070cb52b6c322ac69d6c4df72b05712ca 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -309,7 +309,6 @@ bool dc_stream_set_cursor_attributes(
 
        stream->cursor_attributes = *attributes;
 
-       dc_z10_restore(dc);
        /* disable idle optimizations while updating cursor */
        if (dc->idle_optimizations_allowed) {
                dc_allow_idle_optimizations(dc, false);
@@ -381,12 +380,14 @@ bool dc_stream_set_cursor_position(
        }
 
        dc = stream->ctx->dc;
-       dc_z10_restore(dc);
 
        /* disable idle optimizations if enabling cursor */
-       if (dc->idle_optimizations_allowed && (!stream->cursor_position.enable || dc->debug.exit_idle_opt_for_cursor_updates)
-                       && position->enable) {
+       if (dc->idle_optimizations_allowed &&
+           (!stream->cursor_position.enable || dc->debug.exit_idle_opt_for_cursor_updates ||
+            dc->caps.ips_support) &&
+           position->enable) {
                dc_allow_idle_optimizations(dc, false);
+               dc_z10_restore(dc);
                reset_idle_optimizations = true;
        }
 

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index 8b6c49622f3b63c8e6dae68c507e1e45c5a736a2..da4f98de9b82caf0dbdf0e75660499d1fca1ff12 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -708,8 +708,6 @@ void dcn35_z10_restore(const struct dc *dc)
        if (dc->debug.disable_z10)
                return;
 
-       dc_dmub_srv_apply_idle_power_optimizations(dc, false);
-
        dcn31_z10_restore(dc);
 }