int dpu_core_irq_register_callback(
struct dpu_kms *dpu_kms,
int irq_idx,
- void (*irq_cb)(void *arg, int irq_idx),
+ void (*irq_cb)(void *arg),
void *irq_arg);
/**
int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
int irq,
- void (*func)(void *arg, int irq_idx),
+ void (*func)(void *arg),
struct dpu_encoder_wait_info *wait_info)
{
u32 irq_status;
phys_enc->hw_pp->idx - PINGPONG_0,
atomic_read(wait_info->atomic_cnt));
local_irq_save(flags);
- func(phys_enc, irq);
+ func(phys_enc);
local_irq_restore(flags);
ret = 0;
} else {
*/
int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
int irq,
- void (*func)(void *arg, int irq_idx),
+ void (*func)(void *arg),
struct dpu_encoder_wait_info *wait_info);
/**
phys_enc->hw_intf->ops.program_intf_cmd_cfg(phys_enc->hw_intf, &cmd_mode_cfg);
}
-static void dpu_encoder_phys_cmd_pp_tx_done_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_cmd_pp_tx_done_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
unsigned long lock_flags;
DPU_ATRACE_END("pp_done_irq");
}
-static void dpu_encoder_phys_cmd_te_rd_ptr_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_cmd_te_rd_ptr_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
struct dpu_encoder_phys_cmd *cmd_enc;
DPU_ATRACE_END("rd_ptr_irq");
}
-static void dpu_encoder_phys_cmd_ctl_start_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_cmd_ctl_start_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
DPU_ATRACE_END("ctl_start_irq");
}
-static void dpu_encoder_phys_cmd_underrun_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_cmd_underrun_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
programmable_fetch_config(phys_enc, &timing_params);
}
-static void dpu_encoder_phys_vid_vblank_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_vid_vblank_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
struct dpu_hw_ctl *hw_ctl;
DPU_ATRACE_END("vblank_irq");
}
-static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx)
+static void dpu_encoder_phys_vid_underrun_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
}
-static void _dpu_encoder_phys_wb_frame_done_helper(void *arg)
+/**
+ * dpu_encoder_phys_wb_done_irq - writeback interrupt handler
+ * @arg: Pointer to writeback encoder
+ */
+static void dpu_encoder_phys_wb_done_irq(void *arg)
{
struct dpu_encoder_phys *phys_enc = arg;
struct dpu_encoder_phys_wb *wb_enc = to_dpu_encoder_phys_wb(phys_enc);
wake_up_all(&phys_enc->pending_kickoff_wq);
}
-/**
- * dpu_encoder_phys_wb_done_irq - writeback interrupt handler
- * @arg: Pointer to writeback encoder
- * @irq_idx: interrupt index
- */
-static void dpu_encoder_phys_wb_done_irq(void *arg, int irq_idx)
-{
- _dpu_encoder_phys_wb_frame_done_helper(arg);
-}
-
/**
* dpu_encoder_phys_wb_irq_ctrl - irq control of WB
* @phys: Pointer to physical encoder
/*
* Perform registered function callback
*/
- dpu_kms->hw_intr->irq_tbl[irq_idx].cb(dpu_kms->hw_intr->irq_tbl[irq_idx].arg, irq_idx);
+ dpu_kms->hw_intr->irq_tbl[irq_idx].cb(dpu_kms->hw_intr->irq_tbl[irq_idx].arg);
}
irqreturn_t dpu_core_irq(struct msm_kms *kms)
}
int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
- void (*irq_cb)(void *arg, int irq_idx),
+ void (*irq_cb)(void *arg),
void *irq_arg)
{
unsigned long irq_flags;
const struct dpu_intr_reg *intr_set;
struct {
- void (*cb)(void *arg, int irq_idx);
+ void (*cb)(void *arg);
void *arg;
atomic_t count;
} irq_tbl[];