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drm/amdgpu: correct initial cp_hqd_quantum for gfx9
author
Hawking Zhang
<Hawking.Zhang@amd.com>
Sun, 26 Sep 2021 14:19:35 +0000
(22:19 +0800)
committer
Alex Deucher
<alexander.deucher@amd.com>
Tue, 28 Sep 2021 13:30:08 +0000
(09:30 -0400)
didn't read the value of mmCP_HQD_QUANTUM from correct
register offset
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
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diff --git
a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 603c259b073b4035dacc44f1f9d1647b1d043eb9..025184a556ee6ab539503b6808d4fe261ecd186e 100644
(file)
--- a/
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@
-3599,7
+3599,7
@@
static int gfx_v9_0_mqd_init(struct amdgpu_ring *ring)
/* set static priority for a queue/ring */
gfx_v9_0_mqd_set_priority(ring, mqd);
- mqd->cp_hqd_quantum = RREG32
(
mmCP_HQD_QUANTUM);
+ mqd->cp_hqd_quantum = RREG32
_SOC15(GC, 0,
mmCP_HQD_QUANTUM);
/* map_queues packet doesn't need activate the queue,
* so only kiq need set this field.