i2c: rcar: enable interrupts before starting transfer
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Wed, 15 Sep 2021 13:48:27 +0000 (15:48 +0200)
committerWolfram Sang <wsa@kernel.org>
Wed, 29 Sep 2021 21:02:59 +0000 (23:02 +0200)
We want to enable the interrupts _before_ starting the transfer because
it is good programming style and also the proposed order in the R-Car
manual. There is no difference in practice because it doesn't matter in
which order both conditions appear if we wait for both to happen.

Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
drivers/i2c/busses/i2c-rcar.c

index bff9913c37b8b277d3b101b7d07a152b27ff4c07..fc13511f4562c1f274f346361aa2a44d47817da6 100644 (file)
@@ -339,6 +339,9 @@ static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
                priv->flags |= ID_LAST_MSG;
 
        rcar_i2c_write(priv, ICMAR, i2c_8bit_addr_from_msg(priv->msg));
+       if (!priv->atomic_xfer)
+               rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
+
        /*
         * We don't have a test case but the HW engineers say that the write order
         * of ICMSR and ICMCR depends on whether we issue START or REP_START. Since
@@ -354,9 +357,6 @@ static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
                        rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
                rcar_i2c_write(priv, ICMSR, 0);
        }
-
-       if (!priv->atomic_xfer)
-               rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
 }
 
 static void rcar_i2c_next_msg(struct rcar_i2c_priv *priv)