arm64: dts: imx8mm-evk: Assigned clocks for audio plls

Assign clocks and clock-rates for audio plls, that audio
drivers can utilize them.

Add dai-tdm-slot-num and dai-tdm-slot-width for sound-wm8524,
that sai driver can generate correct bit clock.

Fixes: 13f3b9fdef6c ("arm64: dts: imx8mm-evk: Enable audio codec wm8524")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
index faefb7182af1f3aa279635b7ce4aa1cff914c7fa..5c3b23c4f91f54c27c232dd7b00320fab9949c56 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
@@ -62,6 +62,8 @@
 
                cpudai: simple-audio-card,cpu {
                        sound-dai = <&sai3>;
+                       dai-tdm-slot-num = <2>;
+                       dai-tdm-slot-width = <32>;
                };
 
                simple-audio-card,codec {

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 7c4dcce20f2ea24edd3a97b1187e3b526c10a75e..7f4291aa36c654b901066f997a14dad26077e2fe 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -479,14 +479,18 @@
                                                <&clk IMX8MM_CLK_AUDIO_AHB>,
                                                <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
                                                <&clk IMX8MM_SYS_PLL3>,
-                                               <&clk IMX8MM_VIDEO_PLL1>;
+                                               <&clk IMX8MM_VIDEO_PLL1>,
+                                               <&clk IMX8MM_AUDIO_PLL1>,
+                                               <&clk IMX8MM_AUDIO_PLL2>;
                                assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
                                                         <&clk IMX8MM_SYS_PLL1_800M>;
                                assigned-clock-rates = <0>,
                                                        <400000000>,
                                                        <400000000>,
                                                        <750000000>,
-                                                       <594000000>;
+                                                       <594000000>,
+                                                       <393216000>,
+                                                       <361267200>;
                        };
 
                        src: reset-controller@30390000 {