spi: cadence-quadspi: Add flag for direct mode writes

Create new flag inorder to avoid playing with use_direct_mode
flag currently being used throughout the driver.
Disable DAC write if auto polling is disabled or CQSPI_DISABLE_DAC_MODE
is set.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230125081023.1573712-3-d-gole@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 6030da942c6e98df05e2f1728be1b46f01d160a6..4bbf6e3ad34a01d02443d82ea960a5737c95e091 100644 (file)
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -84,6 +84,7 @@ struct cqspi_st {
        u32                     trigger_address;
        u32                     wr_delay;
        bool                    use_direct_mode;
+       bool                    use_direct_mode_wr;
        struct cqspi_flash_pdata f_pdata[CQSPI_MAX_CHIPSELECT];
        bool                    use_dma_read;
        u32                     pd_dev_id;
@@ -945,6 +946,12 @@ static int cqspi_write_setup(struct cqspi_flash_pdata *f_pdata,
                reg = readl(reg_base + CQSPI_REG_WR_COMPLETION_CTRL);
                reg |= CQSPI_REG_WR_DISABLE_AUTO_POLL;
                writel(reg, reg_base + CQSPI_REG_WR_COMPLETION_CTRL);
+               /*
+                * DAC mode require auto polling as flash needs to be polled
+                * for write completion in case of bubble in SPI transaction
+                * due to slow CPU/DMA master.
+                */
+               cqspi->use_direct_mode_wr = false;
        }
 
        reg = readl(reg_base + CQSPI_REG_SIZE);
@@ -1230,7 +1237,7 @@ static ssize_t cqspi_write(struct cqspi_flash_pdata *f_pdata,
         * data.
         */
        if (!op->cmd.dtr && cqspi->use_direct_mode &&
-           ((to + len) <= cqspi->ahb_size)) {
+           cqspi->use_direct_mode_wr && ((to + len) <= cqspi->ahb_size)) {
                memcpy_toio(cqspi->ahb_base + to, buf, len);
                return cqspi_wait_idle(cqspi);
        }
@@ -1700,8 +1707,10 @@ static int cqspi_probe(struct platform_device *pdev)
                                                cqspi->master_ref_clk_hz);
                if (ddata->hwcaps_mask & CQSPI_SUPPORTS_OCTAL)
                        master->mode_bits |= SPI_RX_OCTAL | SPI_TX_OCTAL;
-               if (!(ddata->quirks & CQSPI_DISABLE_DAC_MODE))
+               if (!(ddata->quirks & CQSPI_DISABLE_DAC_MODE)) {
                        cqspi->use_direct_mode = true;
+                       cqspi->use_direct_mode_wr = true;
+               }
                if (ddata->quirks & CQSPI_SUPPORT_EXTERNAL_DMA)
                        cqspi->use_dma_read = true;
                if (ddata->quirks & CQSPI_NO_SUPPORT_WR_COMPLETION)