arm64: dts: qcom: msm8916: Add tcsr syscon

The TCSR memory segment includes various functionality, among other
things the halt-registers for the Hexagon.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 1e67acc19a9d58495d9af6056f58a8b00ca9d879..64f85f82602c421ae956dac843f1353f42e3fec2 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -234,6 +234,11 @@
                        reg = <0x1905000 0x20000>;
                };
 
+               tcsr: syscon@1937000 {
+                       compatible = "qcom,tcsr-msm8916", "syscon";
+                       reg = <0x1937000 0x30000>;
+               };
+
                tcsr_mutex: hwlock {
                        compatible = "qcom,tcsr-mutex";
                        syscon = <&tcsr_mutex_regs 0 0x1000>;