phy: qcom-qmp-combo: fix sdm845 reset
authorJohan Hovold <johan+linaro@kernel.org>
Mon, 14 Nov 2022 08:13:42 +0000 (09:13 +0100)
committerVinod Koul <vkoul@kernel.org>
Thu, 24 Nov 2022 15:32:59 +0000 (21:02 +0530)
The SDM845 has two resets but the DP configuration erroneously described
only one.

In case the DP part of the PHY is initialised before the USB part (e.g.
depending on probe order), then only the first reset would be asserted.

Add a dedicated configuration for SDM845 rather than reuse the
incompatible SC7180 configuration.

Fixes: d88497fb6bbd ("phy: qualcomm: phy-qcom-qmp: add support for combo USB3+DP phy on SDM845")
Cc: stable@vger.kernel.org # 6.1
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221114081346.5116-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-combo.c

index bb38b18258ca2edb834212117eb15e74919c25f8..cc53e2f991218c33429e56284cde79a1694fb203 100644 (file)
@@ -1084,9 +1084,46 @@ static const struct qmp_phy_cfg sdm845_usb3phy_cfg = {
        .has_pwrdn_delay        = true,
 };
 
+static const struct qmp_phy_cfg sdm845_dpphy_cfg = {
+       .type                   = PHY_TYPE_DP,
+       .lanes                  = 2,
+
+       .serdes_tbl             = qmp_v3_dp_serdes_tbl,
+       .serdes_tbl_num         = ARRAY_SIZE(qmp_v3_dp_serdes_tbl),
+       .tx_tbl                 = qmp_v3_dp_tx_tbl,
+       .tx_tbl_num             = ARRAY_SIZE(qmp_v3_dp_tx_tbl),
+
+       .serdes_tbl_rbr         = qmp_v3_dp_serdes_tbl_rbr,
+       .serdes_tbl_rbr_num     = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_rbr),
+       .serdes_tbl_hbr         = qmp_v3_dp_serdes_tbl_hbr,
+       .serdes_tbl_hbr_num     = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_hbr),
+       .serdes_tbl_hbr2        = qmp_v3_dp_serdes_tbl_hbr2,
+       .serdes_tbl_hbr2_num    = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_hbr2),
+       .serdes_tbl_hbr3        = qmp_v3_dp_serdes_tbl_hbr3,
+       .serdes_tbl_hbr3_num    = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_hbr3),
+
+       .swing_hbr_rbr          = &qmp_dp_v3_voltage_swing_hbr_rbr,
+       .pre_emphasis_hbr_rbr   = &qmp_dp_v3_pre_emphasis_hbr_rbr,
+       .swing_hbr3_hbr2        = &qmp_dp_v3_voltage_swing_hbr3_hbr2,
+       .pre_emphasis_hbr3_hbr2 = &qmp_dp_v3_pre_emphasis_hbr3_hbr2,
+
+       .clk_list               = qmp_v3_phy_clk_l,
+       .num_clks               = ARRAY_SIZE(qmp_v3_phy_clk_l),
+       .reset_list             = msm8996_usb3phy_reset_l,
+       .num_resets             = ARRAY_SIZE(msm8996_usb3phy_reset_l),
+       .vreg_list              = qmp_phy_vreg_l,
+       .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
+       .regs                   = qmp_v3_usb3phy_regs_layout,
+
+       .dp_aux_init = qcom_qmp_v3_phy_dp_aux_init,
+       .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx,
+       .configure_dp_phy = qcom_qmp_v3_phy_configure_dp_phy,
+       .calibrate_dp_phy = qcom_qmp_v3_dp_phy_calibrate,
+};
+
 static const struct qmp_phy_combo_cfg sdm845_usb3dpphy_cfg = {
        .usb_cfg                = &sdm845_usb3phy_cfg,
-       .dp_cfg                 = &sc7180_dpphy_cfg,
+       .dp_cfg                 = &sdm845_dpphy_cfg,
 };
 
 static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {