drm/amd/pm: add SMU11 common gfx ulv control interface

Considering the same logic can be applied to Arcturus, Navi1X
and Sienna Cichlid.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
index 77d0996f4ec2a60274d1c9e234bf12eb29004243..c4743f8d0d230c717521e72785af3cd85baa7617 100644 (file)
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
@@ -274,5 +274,8 @@ int smu_v11_0_get_current_pcie_link_speed(struct smu_context *smu);
 
 void smu_v11_0_init_gpu_metrics_v1_0(struct gpu_metrics_v1_0 *gpu_metrics);
 
+int smu_v11_0_gfx_ulv_control(struct smu_context *smu,
+                             bool enablement);
+
 #endif
 #endif

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
index 81f43fea4d52810a459554e6a2a10897f35b600b..aab83b9572464fb1ecf7e409ae1f78ae79956447 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
@@ -2391,6 +2391,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
        .get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
        .set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
        .get_gpu_metrics = arcturus_get_gpu_metrics,
+       .gfx_ulv_control = smu_v11_0_gfx_ulv_control,
 };
 
 void arcturus_set_ppt_funcs(struct smu_context *smu)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 4b4d461899df4436ec73703b7904027284d8d091..c968f05533d9c2676f16d10ddea1b418293d7c98 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2660,6 +2660,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
        .set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
        .get_gpu_metrics = navi10_get_gpu_metrics,
        .enable_mgpu_fan_boost = navi10_enable_mgpu_fan_boost,
+       .gfx_ulv_control = smu_v11_0_gfx_ulv_control,
 };
 
 void navi10_set_ppt_funcs(struct smu_context *smu)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 407a11c2826b27bc4ad43559ade2a30c9e0407a0..45b9defebd07a0b25075505e10bf6fbdbb08d75b 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -2796,6 +2796,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
        .set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
        .get_gpu_metrics = sienna_cichlid_get_gpu_metrics,
        .enable_mgpu_fan_boost = sienna_cichlid_enable_mgpu_fan_boost,
+       .gfx_ulv_control = smu_v11_0_gfx_ulv_control,
 };
 
 void sienna_cichlid_set_ppt_funcs(struct smu_context *smu)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index ff574ebc179eeb0b4fb2acb91ef72227bd4ba22b..3c98060e04b8b7affaa9eea395a564dcfb743372 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -1985,3 +1985,14 @@ void smu_v11_0_init_gpu_metrics_v1_0(struct gpu_metrics_v1_0 *gpu_metrics)
 
        gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
 }
+
+int smu_v11_0_gfx_ulv_control(struct smu_context *smu,
+                             bool enablement)
+{
+       int ret = 0;
+
+       if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_GFX_ULV_BIT))
+               ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement);
+
+       return ret;
+}