arm64: dts: qcom: msm8994: Add MMCC node
authorKonrad Dybcio <konrad.dybcio@somainline.org>
Sat, 19 Mar 2022 17:46:35 +0000 (18:46 +0100)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 13 Apr 2022 03:07:18 +0000 (22:07 -0500)
Describe the Multimedia Clock Controller block in the DT.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-6-konrad.dybcio@somainline.org
arch/arm64/boot/dts/qcom/msm8994.dtsi

index 499f169ae7736181e6be239caba45b4304f0fbf6..096bde7bb4f1a59da5e716352a186a92bdbd5008 100644 (file)
@@ -4,6 +4,8 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
+#include <dt-bindings/clock/qcom,mmcc-msm8994.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 
 / {
                                drive-strength = <2>;
                        };
                };
+
+               mmcc: clock-controller@fd8c0000 {
+                       compatible = "qcom,mmcc-msm8994";
+                       reg = <0xfd8c0000 0x5200>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+
+                       clock-names = "xo",
+                                     "gpll0",
+                                     "mmssnoc_ahb",
+                                     "oxili_gfx3d_clk_src",
+                                     "dsi0pll",
+                                     "dsi0pllbyte",
+                                     "dsi1pll",
+                                     "dsi1pllbyte",
+                                     "hdmipll";
+                       clocks = <&xo_board>,
+                                <&gcc GPLL0_OUT_MMSSCC>,
+                                <&rpmcc RPM_SMD_MMSSNOC_AHB_CLK>,
+                                <&rpmcc RPM_SMD_GFX3D_CLK_SRC>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>;
+
+                       assigned-clocks = <&mmcc MMPLL0_PLL>,
+                                         <&mmcc MMPLL1_PLL>,
+                                         <&mmcc MMPLL3_PLL>,
+                                         <&mmcc MMPLL4_PLL>,
+                                         <&mmcc MMPLL5_PLL>;
+                       assigned-clock-rates = <800000000>,
+                                              <1167000000>,
+                                              <1020000000>,
+                                              <960000000>,
+                                              <600000000>;
+               };
        };
 
        timer: timer {