arm64: dts: imx8mq-librem5: Reduce I2C frequency to 384kHz

According to imx8mq errata (ERR007805):

> To meet the clock low period requirement in fast speed mode,
> SCL must be configured to 384KHz or less.

Note that the imx i2c driver already implements this erratum and works
around it. This is only for the description to reflect reality.

Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
index 7e70663cffa302c8bc4a29a28f94177d3ea2c305..35bde8d41e8e752851b8485c99f44301ed611c51 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
@@ -778,7 +778,7 @@
 };
 
 &i2c1 {
-       clock-frequency = <387000>;
+       clock-frequency = <384000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c1>;
        status = "okay";
@@ -976,7 +976,7 @@
 };
 
 &i2c2 {
-       clock-frequency = <387000>;
+       clock-frequency = <384000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c2>;
        status = "okay";
@@ -1025,7 +1025,7 @@
 };
 
 &i2c3 {
-       clock-frequency = <387000>;
+       clock-frequency = <384000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c3>;
        status = "okay";
@@ -1115,7 +1115,7 @@
 };
 
 &i2c4 {
-       clock-frequency = <387000>;
+       clock-frequency = <384000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c4>;
        status = "okay";