ARM: dts: aspeed: Add ADC for AST2600 and enable for Rainier and Everest

Add the ADC nodes to the AST2600 devicetree. Enable ADC1 for Rainier and
Everest systems and add an iio-hwmon node for the 7th channel to report
the battery voltage.

Tested on Rainier:
~# cat /sys/class/hwmon/hwmon11/in1_input
1347

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210916210045.31769-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index 3fb1f9091fd8f9dff5ae19874dafc4dd9efa7a0c..53afbcd5845926cb6e8dbfc341526e3046611c3f 100644 (file)
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -243,6 +243,21 @@
                        gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW>;
                };
        };
+
+       iio-hwmon {
+               compatible = "iio-hwmon";
+               io-channels = <&adc1 7>;
+       };
+};
+
+&adc1 {
+       status = "okay";
+       aspeed,int-vref-microvolt = <2500000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
+                                &pinctrl_adc10_default &pinctrl_adc11_default
+                                &pinctrl_adc12_default &pinctrl_adc13_default
+                                &pinctrl_adc14_default &pinctrl_adc15_default>;
 };
 
 &gpio0 {

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 46f077ba73e352a4820daac8b72fa849e69bc6ca..fca511670c5c1ddbc1b856d51d48c7588f36454c 100644 (file)
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -246,6 +246,21 @@
                        linux,code = <11>;
                };
        };
+
+       iio-hwmon {
+               compatible = "iio-hwmon";
+               io-channels = <&adc1 7>;
+       };
+};
+
+&adc1 {
+       status = "okay";
+       aspeed,int-vref-microvolt = <2500000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
+               &pinctrl_adc10_default &pinctrl_adc11_default
+               &pinctrl_adc12_default &pinctrl_adc13_default
+               &pinctrl_adc14_default &pinctrl_adc15_default>;
 };
 
 &ehci1 {

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 1b47be1704f83a885c82e408ef6b70878820546c..ee171b3364fa060f7f0be801f083e319918b0ff7 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -364,6 +364,26 @@
                                status = "disabled";
                        };
 
+                       adc0: adc@1e6e9000 {
+                               compatible = "aspeed,ast2600-adc0";
+                               reg = <0x1e6e9000 0x100>;
+                               clocks = <&syscon ASPEED_CLK_APB2>;
+                               resets = <&syscon ASPEED_RESET_ADC>;
+                               interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+                               #io-channel-cells = <1>;
+                               status = "disabled";
+                       };
+
+                       adc1: adc@1e6e9100 {
+                               compatible = "aspeed,ast2600-adc1";
+                               reg = <0x1e6e9100 0x100>;
+                               clocks = <&syscon ASPEED_CLK_APB2>;
+                               resets = <&syscon ASPEED_RESET_ADC>;
+                               interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+                               #io-channel-cells = <1>;
+                               status = "disabled";
+                       };
+
                        gpio0: gpio@1e780000 {
                                #gpio-cells = <2>;
                                gpio-controller;