dt-bindings: mailbox: imx-mu: add SCU MU support
authorPeng Fan <peng.fan@nxp.com>
Thu, 19 Mar 2020 07:49:50 +0000 (15:49 +0800)
committerJassi Brar <jaswinder.singh@linaro.org>
Fri, 20 Mar 2020 04:02:39 +0000 (23:02 -0500)
i.MX8/8X SCU MU is dedicated for communication between SCU
and Cortex-A cores from hardware design, it could not be reused
for other purpose. To use SCU MU more effectivly, add "fsl,imx8-scu-mu"
compatile to support fast IPC.

Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Documentation/devicetree/bindings/mailbox/fsl,mu.txt

index 9c43357c5924cd2865c6e6e4568d065d78efcb58..31486c9f64431a45b99f2ecb68bb7bcafdb11447 100644 (file)
@@ -23,6 +23,8 @@ Required properties:
                be included together with SoC specific compatible.
                There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu"
                compatible to support it.
+               To communicate with i.MX8 SCU, "fsl,imx8-mu-scu" could be
+               used for fast IPC
 - reg :                Should contain the registers location and length
 - interrupts : Interrupt number. The interrupt specifier format depends
                on the interrupt controller parent.