u8 req_slices);
 
 static inline void
-assert_rpm_device_not_suspended(struct drm_i915_private *i915)
+assert_rpm_device_not_suspended(struct i915_runtime_pm *rpm)
 {
-       WARN_ONCE(i915->runtime_pm.suspended,
+       WARN_ONCE(rpm->suspended,
                  "Device suspended during HW access\n");
 }
 
 static inline void
-assert_rpm_wakelock_held(struct drm_i915_private *i915)
+__assert_rpm_wakelock_held(struct i915_runtime_pm *rpm)
 {
-       assert_rpm_device_not_suspended(i915);
-       WARN_ONCE(!atomic_read(&i915->runtime_pm.wakeref_count),
+       assert_rpm_device_not_suspended(rpm);
+       WARN_ONCE(!atomic_read(&rpm->wakeref_count),
                  "RPM wakelock ref not held during HW access");
 }
 
+static inline void
+assert_rpm_wakelock_held(struct drm_i915_private *i915)
+{
+       __assert_rpm_wakelock_held(&i915->runtime_pm);
+}
+
 /**
  * disable_rpm_wakeref_asserts - disable the RPM assert checks
  * @i915: i915 device instance
 
        struct intel_uncore *uncore = forcewake_domain_to_uncore(domain);
        unsigned long irqflags;
 
-       assert_rpm_device_not_suspended(uncore_to_i915(uncore));
+       assert_rpm_device_not_suspended(uncore->rpm);
 
        if (xchg(&domain->active, false))
                return HRTIMER_RESTART;
        if (!uncore->funcs.force_wake_get)
                return;
 
-       assert_rpm_wakelock_held(uncore_to_i915(uncore));
+       __assert_rpm_wakelock_held(uncore->rpm);
 
        spin_lock_irqsave(&uncore->lock, irqflags);
        __intel_uncore_forcewake_get(uncore, fw_domains);
        if (!uncore->funcs.force_wake_get)
                return;
 
-       assert_rpm_wakelock_held(uncore_to_i915(uncore));
+       __assert_rpm_wakelock_held(uncore->rpm);
 
        fw_domains &= uncore->fw_domains;
        WARN(fw_domains & ~uncore->fw_domains_active,
 #define GEN2_READ_HEADER(x) \
        struct intel_uncore *uncore = &dev_priv->uncore; \
        u##x val = 0; \
-       assert_rpm_wakelock_held(dev_priv);
+       __assert_rpm_wakelock_held(uncore->rpm);
 
 #define GEN2_READ_FOOTER \
        trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
        u32 offset = i915_mmio_reg_offset(reg); \
        unsigned long irqflags; \
        u##x val = 0; \
-       assert_rpm_wakelock_held(dev_priv); \
+       __assert_rpm_wakelock_held(uncore->rpm); \
        spin_lock_irqsave(&uncore->lock, irqflags); \
        unclaimed_reg_debug(uncore, reg, true, true)
 
 #define GEN2_WRITE_HEADER \
        struct intel_uncore *uncore = &dev_priv->uncore; \
        trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
-       assert_rpm_wakelock_held(dev_priv); \
+       __assert_rpm_wakelock_held(uncore->rpm); \
 
 #define GEN2_WRITE_FOOTER
 
        u32 offset = i915_mmio_reg_offset(reg); \
        unsigned long irqflags; \
        trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
-       assert_rpm_wakelock_held(dev_priv); \
+       __assert_rpm_wakelock_held(uncore->rpm); \
        spin_lock_irqsave(&uncore->lock, irqflags); \
        unclaimed_reg_debug(uncore, reg, false, true)
 
        uncore->pmic_bus_access_nb.notifier_call =
                i915_pmic_bus_access_notifier;
 
+       uncore->rpm = &i915->runtime_pm;
+
        if (!intel_uncore_has_forcewake(uncore)) {
                if (IS_GEN(i915, 5)) {
                        ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen5);