LoongArch: Fix GMAC's phy-mode definitions in dts
authorHuacai Chen <chenhuacai@loongson.cn>
Mon, 3 Jun 2024 07:45:53 +0000 (15:45 +0800)
committerHuacai Chen <chenhuacai@loongson.cn>
Mon, 3 Jun 2024 07:45:53 +0000 (15:45 +0800)
The GMAC of Loongson chips cannot insert the correct 1.5-2ns delay. So
we need the PHY to insert internal delays for both transmit and receive
data lines from/to the PHY device. Fix this by changing the "phy-mode"
from "rgmii" to "rgmii-id" in dts.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
arch/loongarch/boot/dts/loongson-2k0500-ref.dts
arch/loongarch/boot/dts/loongson-2k1000-ref.dts
arch/loongarch/boot/dts/loongson-2k2000-ref.dts

index 8aefb0c126722980a345062cae02a6127c02b52e..a34734a6c3ce802f0b735c2689212a459a6372f2 100644 (file)
 &gmac0 {
        status = "okay";
 
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-id";
        bus_id = <0x0>;
 };
 
 &gmac1 {
        status = "okay";
 
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-id";
        bus_id = <0x1>;
 };
 
index 8463fe035386e40daa112740fd9804af6195fb37..23cf26cc3e5f19703220bd20a8e12e1e61a1e941 100644 (file)
@@ -43,7 +43,7 @@
 &gmac0 {
        status = "okay";
 
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-id";
        phy-handle = <&phy0>;
        mdio {
                compatible = "snps,dwmac-mdio";
@@ -58,7 +58,7 @@
 &gmac1 {
        status = "okay";
 
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-id";
        phy-handle = <&phy1>;
        mdio {
                compatible = "snps,dwmac-mdio";
index 74b99bd234cc38df9a087915280e86ddb5bd56d4..ea9e6985d0e9fca980eaad34ca4089b6164ad447 100644 (file)
@@ -92,7 +92,7 @@
 &gmac2 {
        status = "okay";
 
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-id";
        phy-handle = <&phy2>;
        mdio {
                compatible = "snps,dwmac-mdio";