#define DPDMA_IRQ 116
#define APU_ADDR 0xfd5c0000
-#define APU_SIZE 0x100
+#define APU_IRQ 153
#define IPI_ADDR 0xFF300000
#define IPI_IRQ 64
sysbus_connect_irq(sbd, 0, gic[EFUSE_IRQ]);
}
+static void xlnx_zynqmp_create_apu_ctrl(XlnxZynqMPState *s, qemu_irq *gic)
+{
+ SysBusDevice *sbd;
+ int i;
+
+ object_initialize_child(OBJECT(s), "apu-ctrl", &s->apu_ctrl,
+ TYPE_XLNX_ZYNQMP_APU_CTRL);
+ sbd = SYS_BUS_DEVICE(&s->apu_ctrl);
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) {
+ g_autofree gchar *name = g_strdup_printf("cpu%d", i);
+
+ object_property_set_link(OBJECT(&s->apu_ctrl), name,
+ OBJECT(&s->apu_cpu[i]), &error_abort);
+ }
+
+ sysbus_realize(sbd, &error_fatal);
+ sysbus_mmio_map(sbd, 0, APU_ADDR);
+ sysbus_connect_irq(sbd, 0, gic[APU_IRQ]);
+}
+
static void xlnx_zynqmp_create_crf(XlnxZynqMPState *s, qemu_irq *gic)
{
SysBusDevice *sbd;
hwaddr base;
hwaddr size;
} unimp_areas[ARRAY_SIZE(s->mr_unimp)] = {
- { .name = "apu", APU_ADDR, APU_SIZE },
{ .name = "serdes", SERDES_ADDR, SERDES_SIZE },
};
unsigned int nr;
xlnx_zynqmp_create_bbram(s, gic_spi);
xlnx_zynqmp_create_efuse(s, gic_spi);
+ xlnx_zynqmp_create_apu_ctrl(s, gic_spi);
xlnx_zynqmp_create_crf(s, gic_spi);
xlnx_zynqmp_create_unimp_mmio(s);
#include "hw/nvram/xlnx-bbram.h"
#include "hw/nvram/xlnx-zynqmp-efuse.h"
#include "hw/or-irq.h"
+#include "hw/misc/xlnx-zynqmp-apu-ctrl.h"
#include "hw/misc/xlnx-zynqmp-crf.h"
#define TYPE_XLNX_ZYNQMP "xlnx-zynqmp"
/*
* Unimplemented mmio regions needed to boot some images.
*/
-#define XLNX_ZYNQMP_NUM_UNIMP_AREAS 2
+#define XLNX_ZYNQMP_NUM_UNIMP_AREAS 1
struct XlnxZynqMPState {
/*< private >*/
XlnxZDMA adma[XLNX_ZYNQMP_NUM_ADMA_CH];
XlnxCSUDMA qspi_dma;
qemu_or_irq qspi_irq_orgate;
+ XlnxZynqMPAPUCtrl apu_ctrl;
XlnxZynqMPCRF crf;
char *boot_cpu;