ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs

Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on RZ/G1 boards. This allows software to identify the PHY
model at any time, regardless of the state of the PHY reset line.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/ce8ae6b199fa244315a008ae31891a808ca1948d.1631174218.git.geert+renesas@glider.be

diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index bc857676d19104a1c9f4c7e5f739961a22c48803..849034a49a3f98e289009e9b8612b99dd65a75b0 100644 (file)
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -158,6 +158,8 @@
        status = "okay";
 
        phy3: ethernet-phy@3 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <3>;
                micrel,led-mode = <1>;
        };

diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 94bf8a116b5242a94d6635494bbf4c66769c048d..a5a79cdbcd0ee09ba05ccf34f8733eadc4bfbfce 100644 (file)
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -175,6 +175,8 @@
        status = "okay";
 
        phy3: ethernet-phy@3 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <3>;
                micrel,led-mode = <1>;
        };

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 73bd62d8a929e5da26dfe8d39d6ca148824c7827..c105932f642ea517ed80e80de74b648a941b673f 100644 (file)
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -123,6 +123,8 @@
         * On some older versions of the platform (before R4.0) the phy address
         * may be 1 or 3. The address is fixed to 3 for R4.0 onwards.
         */
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <3>;
                micrel,led-mode = <1>;
        };

diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index 8ac61b50aec03190b119b4d1f414a6f0858833df..b024621c998103b2659ca586e404386aa068b2b3 100644 (file)
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -79,6 +79,8 @@
        status = "okay";
 
        phy3: ethernet-phy@3 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <3>;
                interrupt-parent = <&gpio5>;
                interrupts = <16 IRQ_TYPE_LEVEL_LOW>;