KVM: PPC: Book3S HV nestedv2: Ensure LPCR_MER bit is passed to the L0
authorJordan Niethe <jniethe5@gmail.com>
Fri, 1 Dec 2023 13:26:10 +0000 (18:56 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 7 Dec 2023 12:33:07 +0000 (23:33 +1100)
LPCR_MER is conditionally set during entry to a guest if there is a
pending external interrupt. In the nestedv2 case, this change is not
being communicated to the L0, which means it is not being set in the L2.
Ensure the updated LPCR value is passed to the L0.

Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20231201132618.555031-6-vaibhav@linux.ibm.com
arch/powerpc/kvm/book3s_hv.c

index 069c336b6f3c2e5fd307c4a09d5657699e7d15f1..6d1f0bca27aa4c1d64d34a7a17c827e70ac2618a 100644 (file)
@@ -4084,6 +4084,8 @@ static int kvmhv_vcpu_entry_nestedv2(struct kvm_vcpu *vcpu, u64 time_limit,
        if (rc < 0)
                return -EINVAL;
 
+       kvmppc_gse_put_u64(io->vcpu_run_input, KVMPPC_GSID_LPCR, lpcr);
+
        accumulate_time(vcpu, &vcpu->arch.in_guest);
        rc = plpar_guest_run_vcpu(0, vcpu->kvm->arch.lpid, vcpu->vcpu_id,
                                  &trap, &i);